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Searched refs:PMU_BASE_PTR (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h33175 #define PMU_BASE_PTR (PMU) macro
33192 #define PMU_REG_1P0A PMU_REG_1P0A_REG(PMU_BASE_PTR)
33193 #define PMU_REG_1P0A_SET PMU_REG_1P0A_SET_REG(PMU_BASE_PTR)
33194 #define PMU_REG_1P0A_CLR PMU_REG_1P0A_CLR_REG(PMU_BASE_PTR)
33195 #define PMU_REG_1P0A_TOG PMU_REG_1P0A_TOG_REG(PMU_BASE_PTR)
33196 #define PMU_REG_1P0D PMU_REG_1P0D_REG(PMU_BASE_PTR)
33197 #define PMU_REG_1P0D_SET PMU_REG_1P0D_SET_REG(PMU_BASE_PTR)
33198 #define PMU_REG_1P0D_CLR PMU_REG_1P0D_CLR_REG(PMU_BASE_PTR)
33199 #define PMU_REG_1P0D_TOG PMU_REG_1P0D_TOG_REG(PMU_BASE_PTR)
33200 #define PMU_REG_HSIC_1P2 PMU_REG_HSIC_1P2_REG(PMU_BASE_PTR)
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/hal_nxp-3.6.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h29143 #define PMU_BASE_PTR (PMU) macro
29162 #define PMU_REG_1P1 PMU_REG_1P1_REG(PMU_BASE_PTR)
29163 #define PMU_REG_3P0 PMU_REG_3P0_REG(PMU_BASE_PTR)
29164 #define PMU_REG_2P5 PMU_REG_2P5_REG(PMU_BASE_PTR)
29165 #define PMU_REG_CORE PMU_REG_CORE_REG(PMU_BASE_PTR)
29166 #define PMU_MISC0 PMU_MISC0_REG(PMU_BASE_PTR)
29167 #define PMU_MISC1 PMU_MISC1_REG(PMU_BASE_PTR)
29168 #define PMU_MISC1_SET PMU_MISC1_SET_REG(PMU_BASE_PTR)
29169 #define PMU_MISC1_CLR PMU_MISC1_CLR_REG(PMU_BASE_PTR)
29170 #define PMU_MISC1_TOG PMU_MISC1_TOG_REG(PMU_BASE_PTR)
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