OSC_MODE_MASK (reference) in projects: hal_nxp-3.6.0

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Searched refs:OSC_MODE_MASK (Results 1 – 25 of 37) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV11Z7/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 784 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 804 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 784 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 804 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 770 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 790 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW41Z4/drivers/
D	fsl_clock.c	`115 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 714 MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 728 MCG->C2 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE04Z1284/drivers/
D	fsl_clock.c	`25 #define OSC_MODE_MASK \ macro 459 …OSC0->CR = ((OSC0->CR & (uint8_t)(~OSC_MODE_MASK)) \| (uint8_t)(OSC_CR_RANGE(range)) \| ((uint8_t)co… in CLOCK_InitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE04Z4/drivers/
D	fsl_clock.c	`25 #define OSC_MODE_MASK \ macro 459 …OSC0->CR = ((OSC0->CR & (uint8_t)(~OSC_MODE_MASK)) \| (uint8_t)(OSC_CR_RANGE(range)) \| ((uint8_t)co… in CLOCK_InitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE06Z4/drivers/
D	fsl_clock.c	`25 #define OSC_MODE_MASK \ macro 459 …OSC0->CR = ((OSC0->CR & (uint8_t)(~OSC_MODE_MASK)) \| (uint8_t)(OSC_CR_RANGE(range)) \| ((uint8_t)co… in CLOCK_InitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE02Z4/drivers/
D	fsl_clock.c	`25 #define OSC_MODE_MASK \ macro 439 …OSC0->CR = ((OSC0->CR & (uint8_t)(~OSC_MODE_MASK)) \| (uint8_t)(OSC_CR_RANGE(range)) \| ((uint8_t)co… in CLOCK_InitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 895 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 915 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 986 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1006 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 903 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 923 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 898 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 918 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1640 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1668 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0() 1685 MCG->C10 = ((MCG->C10 & ~OSC_MODE_MASK) \| MCG_C10_RANGE1(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc1() 1705 MCG->C10 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc1()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1640 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1668 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0() 1685 MCG->C10 = ((MCG->C10 & ~OSC_MODE_MASK) \| MCG_C10_RANGE1(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc1() 1705 MCG->C10 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc1()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL25Z4/drivers/
D	fsl_clock.c	`87 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 872 MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 886 MCG->C2 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW24D5/drivers/
D	fsl_clock.c	`87 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 955 MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 969 MCG->C2 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW22D5/drivers/
D	fsl_clock.c	`87 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 955 MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 969 MCG->C2 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34Z7/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1077 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1097 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1161 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1181 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV58F24/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1119 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1139 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1176 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1196 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV56F24/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1119 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1139 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK24F12/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1218 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1238 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK63F12/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1217 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1237 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK64F12/drivers/
D	fsl_clock.c	`69 #define OSC_MODE_MASK (MCG_C2_EREFS0_MASK \| MCG_C2_HGO0_MASK \| MCG_C2_RANGE0_MASK) macro 1228 … MCG->C2 = (uint8_t)((MCG->C2 & ~OSC_MODE_MASK) \| MCG_C2_RANGE(range) \| (uint8_t)config->workMode); in CLOCK_InitOsc0() 1248 MCG->C2 &= ~(uint8_t)OSC_MODE_MASK; in CLOCK_DeinitOsc0()`

TraceRecorderSource-2.7.6
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Zephyr-Core-3.5.0
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babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
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