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Searched refs:NETC_F3_SI0_TBICR0_ICEN_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_NETC_F3_SI0.h2159 #define NETC_F3_SI0_TBICR0_ICEN_MASK (0x80000000U) macro
2162 … (((uint32_t)(((uint32_t)(x)) << NETC_F3_SI0_TBICR0_ICEN_SHIFT)) & NETC_F3_SI0_TBICR0_ICEN_MASK)
/hal_nxp-3.6.0/s32/drivers/s32ze/Eth_NETC/src/
DNetc_Eth_Ip.c3198 netcSIsBase[ctrlIndex]->BDR_NUM[ringCounter].TBICR0 &= ~NETC_F3_SI0_TBICR0_ICEN_MASK;
4619 netcSIsBase[CtrlIdx]->BDR_NUM[RingIdx].TBICR0 &= ~NETC_F3_SI0_TBICR0_ICEN_MASK;
4634 …netcSIsBase[CtrlIdx]->BDR_NUM[RingIdx].TBICR0 |= (NETC_F3_SI0_TBICR0_ICEN_MASK | NETC_F3_SI0_TBICR…
4641 netcSIsBase[CtrlIdx]->BDR_NUM[RingIdx].TBICR0 |= NETC_F3_SI0_TBICR0_ICEN_MASK;