NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_MASK (reference) in projects: hal_nxp-3.6.0

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Searched refs:NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Eth_NETC/src/
D	Netc_Eth_Ip_Irq.c	`229 NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_MASK); in Netc_Eth_Ip_ProcessMsgRcv()`
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_NETC_F3_SI0.h	`907 #define NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_MASK (0xFFFFFFC0U) macro 910 …(((uint32_t)(x)) << NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_SHIFT)) & NETC_F3_SI0_PSIVMSGRCVAR0_ADDRL_MASK)`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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