Searched refs:NETC_ETHSWT_IP_MDIO_CLK_DIV (Results 1 – 2 of 2) sorted by relevance
139 #define NETC_ETHSWT_IP_MDIO_CLK_DIV (200U) /*!< MDIO clock divisor, it has… macro
6280 … | NETC_F1_EMDIO_CFG_EHOLD(0U) | NETC_F1_EMDIO_CFG_MDIO_CLK_DIV(NETC_ETHSWT_IP_MDIO_CLK_DIV) \