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Searched refs:MU_PAR_RR_NUM_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MU.h155 #define MU_PAR_RR_NUM_MASK (0xFF00U) macro
158 … (((uint32_t)(((uint32_t)(x)) << MU_PAR_RR_NUM_SHIFT)) & MU_PAR_RR_NUM_MASK)
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MU.h211 #define MU_PAR_RR_NUM_MASK (0xFF00U) macro
214 … (((uint32_t)(((uint32_t)(x)) << MU_PAR_RR_NUM_SHIFT)) & MU_PAR_RR_NUM_MASK)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h65706 #define MU_PAR_RR_NUM_MASK (0xFF00U) macro
65710 #define MU_PAR_RR_NUM(x) (((uint32_t)(((uint32_t)(x)) << MU_PAR_RR_NUM_SHIFT)) & MU_PAR_RR_NUM_MASK)
DMIMX9352_ca55.h57255 #define MU_PAR_RR_NUM_MASK (0xFF00U) macro
57259 … (((uint32_t)(((uint32_t)(x)) << MU_PAR_RR_NUM_SHIFT)) & MU_PAR_RR_NUM_MASK)