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Searched refs:MPWLDECTRL1 (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.6.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h26166 …__IO uint32_t MPWLDECTRL1; /**< MMDC PHY Write Leveling Delay Control … member
26257 #define MMDC_MPWLDECTRL1_REG(base) ((base)->MPWLDECTRL1)