MCG_C7_PLL32KREFSEL_VAL (reference) in projects: hal_nxp-3.6.0

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Searched refs:MCG_C7_PLL32KREFSEL_VAL (Results 1 – 25 of 33) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34Z7/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro 320 mcg_pll_ref_src_t pllRefSrc = (mcg_pll_ref_src_t)MCG_C7_PLL32KREFSEL_VAL; in CLOCK_GetPll0RefFreq()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM35Z7/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro 323 mcg_pll_ref_src_t pllRefSrc = (mcg_pll_ref_src_t)(uint8_t)MCG_C7_PLL32KREFSEL_VAL; in CLOCK_GetPll0RefFreq()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM34ZA5/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro 321 mcg_pll_ref_src_t pllRefSrc = (mcg_pll_ref_src_t)(uint8_t)MCG_C7_PLL32KREFSEL_VAL; in CLOCK_GetPll0RefFreq()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV11Z7/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV10Z7/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW41Z4/drivers/
D	fsl_clock.c	`107 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM14ZA5/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro 373 mcg_pll_ref_src_t pllRefSrc = (mcg_pll_ref_src_t)(uint8_t)MCG_C7_PLL32KREFSEL_VAL; in CLOCK_GetPll0RefFreq()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKM33ZA5/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro 373 mcg_pll_ref_src_t pllRefSrc = (mcg_pll_ref_src_t)(uint8_t)MCG_C7_PLL32KREFSEL_VAL; in CLOCK_GetPll0RefFreq()`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK02F12810/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK22F12810/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F12810/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV30F12810/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKL25Z4/drivers/
D	fsl_clock.c	`79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW24D5/drivers/
D	fsl_clock.c	`79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKW22D5/drivers/
D	fsl_clock.c	`79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F25612/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV58F24/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV31F51212/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKV56F24/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK24F12/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK63F12/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK64F12/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/drivers/
D	fsl_clock.c	`61 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT) macro`

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