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Searched refs:MAC_RXQ_CTRL4 (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h109 __IO uint32_t MAC_RXQ_CTRL4; /**< MAC RxQ Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h35779 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMXRT1175_cm4.h35777 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h35779 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h37783 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMXRT1173_cm4.h37781 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h37786 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h37786 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMXRT1176_cm4.h37784 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h33730 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h33730 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_ca53.h33756 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMX8ML8_cm7.h33730 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMX8ML8_dsp.h32147 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h33730 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h22448 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member
DMIMX9352_ca55.h20129 __IO uint32_t MAC_RXQ_CTRL4; /**< Receive Queue Control 4, offset: 0x94 */ member