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Searched refs:LPCG_TUPLE_REG_BASE (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.c61 return CLOCK_EnableClockExtMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name, gate); in CLOCK_EnableClockExt()
100 return CLOCK_DisableClockMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name); in CLOCK_DisableClock()
275 CLOCK_ConfigLPCGMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name, swGate, hwGate); in CLOCK_ConfigLPCG()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX6/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX4/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX3/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX3/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX1/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX2/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX2/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX1/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX4/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX5/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
Dfsl_clock.h253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8UX6/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX5/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX6/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8UX5/drivers/
Dfsl_clock.c243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()

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