Home
last modified time | relevance | path

Searched refs:IFER0 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Icu/src/
DSiul2_Icu_Ip.c294 baseAe->IFER0 &= ~((uint32)1U << hwChannel); in Siul2_Icu_Ip_DeInit()
305 base->IFER0 &= ~((uint32)1U << hwChannel); in Siul2_Icu_Ip_DeInit()
394 baseAe->IFER0 |= pinIntValue; in Siul2_Icu_Ip_Init()
398 baseAe->IFER0 &= ~pinIntValue; in Siul2_Icu_Ip_Init()
441 base->IFER0 |= pinIntValue; in Siul2_Icu_Ip_Init()
445 base->IFER0 &= ~pinIntValue; in Siul2_Icu_Ip_Init()
/hal_nxp-3.6.0/s32/drivers/s32k3/Icu/src/
DSiul2_Icu_Ip.c241 base->IFER0 &= ~((uint32)1U << hwChannel); in Siul2_Icu_Ip_DeInit()
317 base->IFER0 |= pinIntValue; in Siul2_Icu_Ip_Init()
321 base->IFER0 &= ~pinIntValue; in Siul2_Icu_Ip_Init()
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SIUL2.h93 …__IO uint32_t IFER0; /**< SIUL2 Interrupt Filter Enable 0, offset: 0x3… member
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_SIUL2.h93 …__IO uint32_t IFER0; /**< SIUL2 Interrupt Filter Enable Register 0, of… member