Searched refs:GPC_ISR5_ISR5_MASK (Results 1 – 11 of 11) sorted by relevance
14688 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro14690 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
17263 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro17265 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
20709 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro20711 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
20725 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro20727 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
21655 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro21657 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
23026 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro23028 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
23028 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro23030 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
22440 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro22442 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
23405 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro23407 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
24191 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro24193 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
24254 #define GPC_ISR5_ISR5_MASK (0xFFFFFFFFU) macro24256 … (((uint32_t)(((uint32_t)(x)) << GPC_ISR5_ISR5_SHIFT)) & GPC_ISR5_ISR5_MASK)
