1 /* 2 * Copyright 2021-2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETH_IP_TYPES_H 8 #define NETC_ETH_IP_TYPES_H 9 10 /** 11 * @file Netc_Eth_Ip_Types.h 12 * 13 * @addtogroup NETC_ETH_DRIVER NETC_ETH Driver 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Netc_Eth_Ip_Cfg_Defines.h" 28 #include "Netc_Eth_Ip_Features.h" 29 #include "Netc_Eth_Ip_Cfg.h" 30 31 /*================================================================================================== 32 * SOURCE FILE VERSION INFORMATION 33 ==================================================================================================*/ 34 #define NETC_ETH_IP_TYPES_VENDOR_ID 43 35 #define NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 36 #define NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 37 #define NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 38 #define NETC_ETH_IP_TYPES_SW_MAJOR_VERSION 1 39 #define NETC_ETH_IP_TYPES_SW_MINOR_VERSION 0 40 #define NETC_ETH_IP_TYPES_SW_PATCH_VERSION 0 41 42 /*================================================================================================== 43 * FILE VERSION CHECKS 44 ==================================================================================================*/ 45 /* Checks against Netc_Eth_Ip_Cfg_Defines.h */ 46 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_CFG_DEFINES_VENDOR_ID) 47 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h have different vendor ids" 48 #endif 49 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 50 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 51 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 52 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h are different" 53 #endif 54 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 55 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 56 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_CFG_DEFINES_SW_PATCH_VERSION) \ 57 ) 58 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg_Defines.h are different" 59 #endif 60 61 /* Checks against Netc_Eth_Ip_Features.h */ 62 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_FEATURES_VENDOR_ID) 63 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h have different vendor ids" 64 #endif 65 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_MAJOR_VERSION) || \ 66 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_MINOR_VERSION) || \ 67 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_FEATURES_AR_RELEASE_REVISION_VERSION)) 68 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h are different" 69 #endif 70 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_FEATURES_SW_MAJOR_VERSION) || \ 71 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_FEATURES_SW_MINOR_VERSION) || \ 72 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_FEATURES_SW_PATCH_VERSION) \ 73 ) 74 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Features.h are different" 75 #endif 76 77 /* Checks against Netc_Eth_Ip_Cfg.h */ 78 #if (NETC_ETH_IP_TYPES_VENDOR_ID != NETC_ETH_IP_CFG_VENDOR_ID) 79 #error "Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h have different vendor ids" 80 #endif 81 #if ((NETC_ETH_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 82 (NETC_ETH_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 83 (NETC_ETH_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETH_IP_CFG_AR_RELEASE_REVISION_VERSION)) 84 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h are different" 85 #endif 86 #if ((NETC_ETH_IP_TYPES_SW_MAJOR_VERSION != NETC_ETH_IP_CFG_SW_MAJOR_VERSION) || \ 87 (NETC_ETH_IP_TYPES_SW_MINOR_VERSION != NETC_ETH_IP_CFG_SW_MINOR_VERSION) || \ 88 (NETC_ETH_IP_TYPES_SW_PATCH_VERSION != NETC_ETH_IP_CFG_SW_PATCH_VERSION) \ 89 ) 90 #error "Software Version Numbers of Netc_Eth_Ip_Types.h and Netc_Eth_Ip_Cfg.h are different" 91 #endif 92 /*================================================================================================== 93 * CONSTANTS 94 ==================================================================================================*/ 95 96 /*================================================================================================== 97 * DEFINES AND MACROS 98 ==================================================================================================*/ 99 100 /*! 101 * @brief CMBDR requeste length field. 102 */ 103 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT (20U) 104 /*! 105 * @brief CMBDR requeste length field mask. 106 */ 107 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK (0xFFF00000UL) 108 /*! 109 * @brief CMBDR requeste lengtht. 110 */ 111 #define NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK) 112 113 /*! 114 * @brief CMBDR response length field. 115 */ 116 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT (0U) 117 /*! 118 * @brief CMBDR response length field mask. 119 */ 120 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK (0x000FFFFFUL) 121 /*! 122 * @brief CMBDR response length. 123 */ 124 #define NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK) 125 126 /** @brief CMD field */ 127 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT (0U) 128 /** @brief CMD field mask */ 129 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK (0x0000000FUL) 130 /** @brief CMD field set */ 131 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK) 132 133 /*! 134 * @brief CMBDR request config access method field. 135 */ 136 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT (12U) 137 /*! 138 * @brief CMBDR request config access method field mask. 139 */ 140 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK (0x00003000UL) 141 /*! 142 * @brief CMBDR request config field access method. 143 */ 144 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK) 145 146 /*! 147 * @brief CMBDR request config field table id. 148 */ 149 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT (16U) 150 /*! 151 * @brief CMBDR request config field table id mask. 152 */ 153 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK (0x00FF0000UL) 154 /*! 155 * @brief CMBDR request config table id. 156 */ 157 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK) 158 159 /*! 160 * @brief CMBDR request version field. 161 */ 162 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT (24U) 163 /*! 164 * @brief CMBDR request version field mask. 165 */ 166 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK (0x3F000000UL) 167 /*! 168 * @brief CMBDR request version. 169 */ 170 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK) 171 172 /*! 173 * @brief CMBDR request config field. 174 */ 175 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT (30U) 176 /*! 177 * @brief CMBDR request config field mask. 178 */ 179 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK (0x4F000000UL) 180 /*! 181 * @brief CMBDR request config. 182 */ 183 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK) 184 185 /*! 186 * @brief CMBDR request RR field. 187 */ 188 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT (31U) 189 /*! 190 * @brief CMBDR request RR field mask. 191 */ 192 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK (0x80000000UL) 193 /*! 194 * @brief CMBDR request RR. 195 */ 196 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK) 197 198 /*! 199 * @brief CMBDR request NPF field. 200 */ 201 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT (15U) 202 /*! 203 * @brief CMBDR request NPF field mask. 204 */ 205 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_MASK (0x00008000UL) 206 /*! 207 * @brief CMBDR request NPF. 208 */ 209 #define NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_NPF_FIELD_MASK) 210 211 #define NETC_ETH_IP_RSPHEADER_STATUS_FIELD_INDEX (0x3U) /*!< status field includes RR bit, ERROR field and NUM_MATCHED field in Response Header Format */ 212 213 /* +++definitions for NTMP response message+++ */ 214 /*! 215 * @brief CMBDR RR status field. 216 */ 217 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_SHIFT (31U) 218 /*! 219 * @brief CMBDR RR status field mask. 220 */ 221 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_MASK (0x80000000UL) 222 223 /*! 224 * @brief CMBDR error status field. 225 */ 226 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_SHIFT (16U) 227 /*! 228 * @brief CMBDR error status field mask. 229 */ 230 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_MASK (0x0FFF0000UL) 231 232 /*! 233 * @brief CMBDR status field num matched. 234 */ 235 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_SHIFT (0U) 236 /*! 237 * @brief CMBDR status field num matched mask. 238 */ 239 #define NETC_ETH_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_MASK (0x0000FFFFUL) 240 /* ---definitions for NTMP response message--- */ 241 242 /* +++definitions for NTMP V1.0 CBD fields+++ */ 243 /** @brief EN field */ 244 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_SHIFT (31U) 245 /** @brief EN field mask */ 246 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_MASK (0xF0000000UL) 247 /** @brief EN field set */ 248 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_EN_MASK) 249 250 /** @brief SF field */ 251 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_SHIFT (31U) 252 /** @brief SF field mask */ 253 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_MASK (0xF0000000UL) 254 /** @brief SF field set */ 255 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SF_MASK) 256 257 /** @brief CI field */ 258 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_SHIFT (30U) 259 /** @brief CI field mask */ 260 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_MASK (0xF0000000UL) 261 /** @brief CI field set */ 262 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CI_MASK) 263 264 /** @brief STATUS field */ 265 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_SHIFT (24U) 266 /** @brief STATUS field mask */ 267 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_MASK (0xFF000000UL) 268 /** @brief STATUS field set */ 269 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_MASK) 270 271 /** @brief CLASS field */ 272 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_SHIFT (8U) 273 /** @brief CLASS field mask */ 274 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_MASK (0xFFFFFF00UL) 275 /** @brief CLASS field set */ 276 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_CLASS_MASK) 277 278 /** @brief COMMAND field */ 279 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_SHIFT (0U) 280 /** @brief COMMAND field mask */ 281 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_MASK (0xFFFFFFFFUL) 282 /** @brief COMMAND field set */ 283 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_COMMAND_MASK) 284 285 /** @brief STATUS field shift */ 286 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_LEFT_SHIFT (3U) 287 /** @brief STATUS field mask */ 288 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RIGHT_SHIFT (27U) 289 /** @brief STATUS field get */ 290 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_GET_STATUS(x) (uint8)(((x) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_LEFT_SHIFT) >> NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_STATUS_RIGHT_SHIFT) 291 292 /** @brief TPID field */ 293 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT (16U) 294 /** @brief TPID field set mask */ 295 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SET_MASK (0x000F0000UL) 296 /** @brief TPID field get mask */ 297 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_GET_MASK (0x0000000FUL) 298 /** @brief TPID field set */ 299 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_SET_TPID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SET_MASK) 300 /** @brief TPID field get */ 301 #define NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_GET_TPID(x) (((uint32)(((uint32)(x)) >> NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_SHIFT)) & NETC_ETH_IP_CMDBD_REQFMT_CONFIG_FIELD_TPID_GET_MASK) 302 /* ---definitions for NTMP V1.0 CBD fields--- */ 303 304 305 #define NETC_ETH_RFS_ENTRY_SET_DATA_BUFFER_SIZE (116U/4U) /*there are a total of 116bytes for RFS table which will be loaded into a uint32 array*/ 306 /*! 307 * @brief Time Gate Scheduling Table CFGE_DATA field. 308 */ 309 /* Administrative Traffic Class Gate States for Gate Entry */ 310 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT (0U) 311 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK (0x000000FFUL) 312 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT)) & NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK) 313 314 /* Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 315 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT (16U) 316 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK (0x000F0000UL) 317 #define NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT)) & NETC_ETH_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK) 318 319 /*! 320 * @brief Tables Request Data Buffer CFGEU field. 321 */ 322 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT (0U) 323 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK (0x00000001UL) 324 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK) 325 326 /*! 327 * @brief Tables Request Data Buffer QUERY_ACTIONS field. 328 */ 329 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT (24U) 330 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK (0x0F000000UL) 331 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK) 332 333 /*! 334 * @brief Tables Request Data Buffer TABLE_VERSION field. 335 */ 336 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT (28U) 337 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK (0xF0000000UL) 338 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSIONS(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK) 339 340 /*! 341 * @brief Eth Rate Policer Table Request Data Buffer FEEU field. 342 */ 343 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT (1U) 344 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK (0x00000002UL) 345 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK) 346 347 /*! 348 * @brief Eth Rate Policer Table Request Data Buffer PSEU field. 349 */ 350 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT (2U) 351 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK (0x00000004UL) 352 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK) 353 354 /*! 355 * @brief Eth Rate Policer Table Request Data Buffer STSEU field. 356 */ 357 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (3U) 358 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000008UL) 359 #define NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 360 361 /*! 362 * @brief Eth Rate Policer Table FEE_DATA Format 363 */ 364 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT (0U) 365 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK (0x00000001UL) 366 #define NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK) 367 368 /*! 369 * @brief Eth Rate Policer Table CFGE_DATA config bits Format 370 */ 371 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT (0U) 372 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK (0x00000001UL) 373 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK) 374 375 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT (1U) 376 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK (0x00000002UL) 377 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK) 378 379 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT (2U) 380 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK (0x00000004UL) 381 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK) 382 383 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT (3U) 384 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK (0x00000008UL) 385 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK) 386 387 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT (4U) 388 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK (0x00000010UL) 389 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK) 390 391 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT (5U) 392 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK (0x00000060UL) 393 #define NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT)) & NETC_ETH_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK) 394 395 /*! 396 * @brief Ingress Port Filter table CFGE_DATA config field. 397 */ 398 /* IPV field */ 399 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT (0U) 400 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK (0x0000000FUL) 401 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK) 402 403 /* OIPV */ 404 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT (4U) 405 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK (0x00000010UL) 406 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK) 407 408 /* DR */ 409 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT (5U) 410 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_MASK (0x00000060UL) 411 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_DR_MASK) 412 413 /* ODR */ 414 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT (7U) 415 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK (0x00000080UL) 416 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK) 417 418 /* FLTFA */ 419 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT (8U) 420 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK (0x00000300UL) 421 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK) 422 423 /* WOLTE */ 424 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT (12U) 425 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK (0x00001000UL) 426 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK) 427 /* FLTA */ 428 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT (13U) 429 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK (0x00006000UL) 430 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK) 431 432 /* RPR */ 433 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT (15U) 434 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK (0x00018000UL) 435 #define NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT)) & NETC_ETH_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK) 436 437 /*! 438 * @brief Ingress Port Filter table KEYE_DATA field. 439 */ 440 /* DSCP field */ 441 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT (0U) 442 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK (0x0000003FUL) 443 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK) 444 445 /* DSCP Mask field */ 446 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT (6U) 447 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK (0x00000FC0UL) 448 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK) 449 450 /* SRC_PORT field */ 451 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT (16U) 452 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK (0x001F0000UL) 453 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK) 454 455 /* SRC_PORT Mask field */ 456 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT (21U) 457 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK (0x03E00000UL) 458 #define NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT)) & NETC_ETH_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK) 459 460 /*! 461 * @brief Ingress Port Filter table Request Data Buffer STSEU field. 462 */ 463 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 464 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 465 #define NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETH_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 466 467 /*! 468 * @brief Filter Forwarding Action data type definitions for Ingress Port Filter Table. 469 */ 470 typedef uint32 Netc_Eth_Ip_CfgeFilterForwardingActionDataType; 471 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_DISCARDFRAMES (0x0U) /*!< discard frames */ 472 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_PERMITFRAMES (0x1U) /*!< permit frames */ 473 474 /*! 475 * @brief Filter Action data type definitions for Ingress Port Filter Table. 476 */ 477 typedef uint32 Netc_Eth_Ip_CfgeFilterActionDataType; 478 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_NOACTION (0x0U) /*!< no action */ 479 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_RATEACTION (0x1U) /*!< Rate action with the Rate Policer Entry ID (RP_EID) set to the value configured in the FLTA_TGT field of this entry */ 480 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_INGRESSSTREAMIDENTIFICATIONACTION (0x2U) /*!< Ingress stream identification action where the Ingress Stream Entry ID (IS_EID) is set to the value configured in the FLTA_TGT field of this entry */ 481 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_SETTINGL2FILTERINGSIBITMAP (0x3U) /*!< valid on ENETC side. Setting a pre L2 filtering SI bitmap that will be used by the L2 filtering function to determine the final SI bitmap */ 482 483 484 485 486 /*! 487 * @brief Receive Flow Steering Entry definitions. 488 */ 489 #define NETC_ETH_IP_RFS_ENTRY_MODE_FIELD_SHIFT (16U) 490 #define NETC_ETH_IP_RFS_ENTRY_EN_FIELD_SHIFT (31U) 491 #define NETC_ETH_IP_RFS_ENTRY_L4PROTMASK_FIELD_SHIFT (8U) 492 #define NETC_ETH_IP_RFS_ENTRY_IPPRESENT_FIELD_SHIFT (18U) 493 #define NETC_ETH_IP_RFS_ENTRY_IPPRESENTMASK_FIELD_SHIFT (19U) 494 #define NETC_ETH_IP_RFS_ENTRY_L4PROTPRESENT_FIELD_SHIFT (20U) 495 #define NETC_ETH_IP_RFS_ENTRY_L4PROTPRESENTMASK_FIELD_SHIFT (21U) 496 #define NETC_ETH_IP_RFS_ENTRY_TCPUDPPRESENT_FIELD_SHIFT (22U) 497 #define NETC_ETH_IP_RFS_ENTRY_TCPUDPPRESENTMASK_FIELD_SHIFT (23U) 498 #define NETC_ETH_IP_RFS_ENTRY_IPV4IPV6_FIELD_SHIFT (24U) 499 #define NETC_ETH_IP_RFS_ENTRY_IPV4IPV6MASK_FIELD_SHIFT (25U) 500 #define NETC_ETH_IP_RFS_ENTRY_UDPTCP_FIELD_SHIFT (26U) 501 #define NETC_ETH_IP_RFS_ENTRY_UDPTCPMASK_FIELD_SHIFT (27U) 502 #define NETC_ETH_IP_RFS_ENTRY_L4DESTPORTMASK_FIELD_SHIFT (16U) 503 #define NETC_ETH_IP_RFS_ENTRY_L4SRCPORTMASK_FIELD_SHIFT (16U) 504 505 #define NETC_ETH_IP_64BYTE_TO_FIRST_WORD(x) ((x) & 0x00000000FFFFFFFFULL) 506 #define NETC_ETH_IP_64BYTE_TO_SECOND_WORD(x) (((x) & 0xFFFFFFFF00000000ULL) >> 32U) 507 508 509 /*================================================================================================== 510 * ENUMS 511 ==================================================================================================*/ 512 /** @brief Controller power state indication. 513 * implements Netc_Eth_Ip_PowerStateType_enum */ 514 typedef enum 515 { 516 NETC_ETH_STATE_INACTIVE = 0U, /*!< Controller is powered on and Transmitter/Receiver are disabled */ 517 NETC_ETH_STATE_ACTIVE = 1U /*!< Controller is powered on and Transmitter/Receiver are enabled */ 518 } Netc_Eth_Ip_PowerStateType; 519 520 /** @brief Type of the SI. */ 521 typedef enum 522 { 523 NETC_ETH_IP_PHYSICAL_SI = 0U, /*!< Phyisical SI. */ 524 NETC_ETH_IP_VIRTUAL_SI = 1U /*!< Virtual SI. */ 525 } Netc_Eth_Ip_StationInterfaceType; 526 527 /** @brief Ingress congestion management priority. Used for congestion management. 528 * TODO: Not in use. 529 */ 530 typedef enum 531 { 532 ICM_LOW_PRIORITY = 0U, /*!< ICM low priority */ 533 ICM_HIGH_PRIORITY = 1U /*!< ICM high priority */ 534 } Netc_Eth_Ip_ICMType; 535 536 /** @brief Return values. 537 * implements Netc_Eth_Ip_StatusType_enum */ 538 typedef enum 539 { 540 /* Generic error codes */ 541 NETC_ETH_IP_STATUS_SUCCESS = 0x000U, /*!< Generic operation success status */ 542 NETC_ETH_IP_STATUS_ERROR = 0x001U, /*!< Generic operation failure status */ 543 NETC_ETH_IP_STATUS_TIMEOUT = 0x003U, /*!< Generic operation timeout status */ 544 NETC_ETH_IP_STATUS_UNSUPPORTED = 0x004U, /*!< Generic operation unsupported status. */ 545 NETC_ETH_IP_STATUS_MAC_ADDR_NOT_FOUND = 0x005U, /*!< The current searched MAC address is not used. */ 546 NETC_ETH_IP_STATUS_MAC_ADDR_TABLE_FULL = 0x006U, /*!< Table of MAC address is full. */ 547 NETC_ETH_IP_STATUS_DELETE_MAC_ADDR = 0x007U, /*!< MAC address was removed with success. */ 548 NETC_ETH_IP_CBDRSTATUS_RINGFULL = 0x008U, /*!< Ring is full */ 549 NETC_ETH_CBDRSTATUS_ACCESSMETHOD_ERROR = 0x009U, /*!< Access method error (does not support) */ 550 NETC_ETH_IP_STATUS_HOSTREASON_UNKNOWN = 0x100U, 551 NETC_ETH_IP_STATUS_HOSTREASON_TIMESTAMP = 0x101U, 552 553 /*PSI user defined message codes */ 554 NETC_ETH_IP_PSITOVSI_CMD_SUCCESFUL = 0x8000U, /*!< PSI sent positive response, VSI command executed succesful */ 555 NETC_ETH_IP_PSITOVSI_PERMISSION_DENIED = 0x8001U, /*!< PSI sent negative response - permission denied */ 556 NETC_ETH_IP_PSITOVSI_SYNC_STATUS_TRUE = 0x8002U, /*!< PSI sent affirmative response to sync status request */ 557 NETC_ETH_IP_PSITOVSI_SYNC_STATUS_FALSE = 0x8003U, /*!< PSI sent negative response to sync status request */ 558 559 NETC_ETH_IP_STATUS_TX_MANAGEMENT_BUFF_BUSY = 0x904U, /*!< All internal TX buffers are currently in use */ 560 /* Specific error codes */ 561 NETC_ETH_IP_STATUS_RX_QUEUE_EMPTY = 0xA01U, /*!< There is no available frame in the receive queue */ 562 NETC_ETH_IP_STATUS_TX_QUEUE_FULL = 0xA02U, /*!< There is no available space for the frame in the transmit queue */ 563 NETC_ETH_IP_STATUS_BUFF_NOT_FOUND = 0xA03U, /*!< The specified buffer was not found in the queue */ 564 NETC_ETH_IP_STATUS_TX_BUFF_BUSY = 0xA04U, /*!< All internal TX buffers are currently in use */ 565 NETC_ETH_IP_STATUS_TX_BUFF_OVERFLOW = 0xA05U, /*!< The requested TX buffer length is not supported. */ 566 NETC_ETH_IP_STATUS_INVALID_FRAME_LENGTH = 0xA06U, /*!< The length of the frame should be minimum 16 bytes. */ 567 #if(NETC_ETH_IP_HAS_CACHE_MANAGEMENT == STD_ON) 568 NETC_ETH_IP_STATUS_CACHE_ERROR = 0xA07U, /*!< Cache operation failed. */ 569 #endif 570 NETC_ETH_IP_STATUS_NOT_REAL_ERROR = 0x8AU /*!< Error code 0x8A is not a real error. This need to be cover errata */ 571 } Netc_Eth_Ip_StatusType; 572 573 /** @brief Counters supported by ENETC. 574 * implements Netc_Eth_Ip_CounterType_enum */ 575 typedef enum 576 { 577 NETC_ETH_IP_SIROCT = 0x300U, /*!< Station interface receive octets counter(ifInOctets). All bytes received (without frame errors) by the SI except preamble, 578 SFD and CRC (if the CRC has been removed from the frame by the MAC). */ 579 NETC_ETH_IP_SIRFRM = 0x308U, /*!< Station interface receive frame counter (aFrameReceivedOK). Number of frames received by the SI without errors. */ 580 NETC_ETH_IP_SIRUCA = 0x310U, /*!< Station interface receive unicast frame counter (ifInUcastPkts). Number of unicast frames received by the SI without errors. */ 581 NETC_ETH_IP_SIRMCA = 0x318U, /*!< Station interface receive multicast frame counter (ifInMulticastPkts). Number of multicast frames received by the SI without errors. */ 582 NETC_ETH_IP_SITOCT = 0x320U, /*!< Station interface transmit octets counter (ifOutOctets). All bytes transmitted (without errors) by the SI except preamble, 583 SFD and CRC (if CRC has been appended to the frame by the MAC). */ 584 NETC_ETH_IP_SITFRM = 0x328U, /*!< Station interface transmit frame counter (aFrameTransmittedOK). Number of frames transmitted by the SI without errors with the exception 585 of frames with error (BD status code point) 0x020 (frame dropped due to port reset) or 0x0A0 (multi-bit ECC error), which will be counted in this counter.*/ 586 NETC_ETH_IP_SITUCA = 0x330U, /*!< Station interface transmit unicast frame counter (ifOutUcastPkts). Number of unicast frames transmitted by the SI without errors. */ 587 NETC_ETH_IP_SITMCA = 0x338U, /*!< Station interface transmit multicast frame counter (ifOutMulticastPkts). Number of multicast frames transmitted by the SI without errors. */ 588 } Netc_Eth_Ip_CounterType; 589 590 /** @brief VLAN Protocol Identifier, which can be inserted in transmission and are acceptable for VLAN removal in reception. 591 * implements Netc_Eth_Ip_VlanProtocolIdentifierType_enum 592 */ 593 typedef enum 594 { 595 NETC_ETH_IP_STANDARD_CVLAN = 0x00U, /*!< Standard C-VLAN 0x8100 */ 596 NETC_ETH_IP_STANDARD_SVLAN = 0x01U, /*!< Standard S-VLAN 0x88A8 */ 597 NETC_ETH_IP_CUSTOM_VLAN1 = 0x02U, /*!< Custom VLAN as defined by CVLANR1[ETYPE] */ 598 NETC_ETH_IP_CUSTOM_VLAN2 = 0x03U /*!< Custom VLAN as defined by CVLANR2[ETYPE] */ 599 } Netc_Eth_Ip_VlanProtocolIdentifierType; 600 601 /** @brief Error type returned when transmit status is unsuccessfully. 602 * implements Netc_Eth_Ip_TxStatusType_enum */ 603 typedef enum 604 { 605 NETC_ETH_TX_NO_ERR = 0x000U, /*!< No error detected after transmit. */ 606 NETC_ETH_TX_PROGRM_ERR = 0x001U, /*!< An error exists in either the Tx BD, the Tx ring registers, or some combination of these. */ 607 NETC_ETH_TX_TSDD = 0x002U, /*!< TSDD - Time specific departure drop. */ 608 NETC_ETH_TX_FRAME_SIZE_ERROR = 0x008U, /*!< Frame size error - consult the RM to get all possibilities. */ 609 NETC_ETH_TX_NULL_ADDR = 0x009U, /*!< Null address */ 610 NETC_ETH_TX_INVALID_FBC_LENGTH = 0x00AU, /*!< Invalid frame/buffer/chain length */ 611 NETC_ETH_TX_MAC_SPOOFING = 0x010U, /*!< Source MAC address spoofing detected */ 612 NETC_ETH_TX_FRM_DROP_PORT_RESET = 0x020U, /*!< Frame dropped due to port reset. */ 613 NETC_ETH_TX_FRM_DROP_PORT_DISABLE = 0x021U, /*!< Frame dropped due to port disabled. */ 614 NETC_ETH_TX_VLAN_TPID_NOTALLOWED = 0x040U, /*!< VLAN TPID not allowed. */ 615 NETC_ETH_TX_PROGRM_ERR_IN_BDR = 0x060U, /*!< Programming error in buffer descriptor used for direct switch enqueue */ 616 NETC_ETH_TX_FRM_TOO_LARGE = 0x080U, /*!< Frame too large for time gating window. */ 617 NETC_ETH_TX_AXI_READ_ERR = 0x090U, /*!< Frame not transmitted (dropped) due to an AXI read error detected. */ 618 NETC_ETH_TX_AXI_WRITE_ERR = 0x091U, /*!< Frame not transmitted (dropped) due to an AXI write error detected. */ 619 NETC_ETH_TX_MULTIBIT_ECC_ERR = 0x0A0U, /*!< Frame not transmitted (dropped) due to a multi-bit ECC error detected. */ 620 NETC_ETH_TX_PARITY_ERR = 0x0F0U, /*!< Frame not transmitted (dropped) due to a parity write error detected. */ 621 NETC_ETH_TX_FRM_DROP_SW_CONGESTION = 0x100U, /*!< Frame dropped due to switch congestion */ 622 NETC_ETH_TX_NOT_SENT = 0xFFFU /*!< Frame not transmitted yet */ 623 } Netc_Eth_Ip_TxStatusType; 624 625 /** @brief Error type returned when receive status is unsuccessfully. 626 * implements Netc_Eth_Ip_RxStatusType_enum */ 627 typedef enum 628 { 629 NETC_ETH_RX_NO_RECEIVE_ERR = 0x00U, /*!< No error detected. */ 630 NETC_ETH_RX_FRM_CRC_FAIL = 0x20U, /*!< Frame CRC (FCS) validation failed. */ 631 NETC_ETH_RX_L3_CKSUM_FAIL = 0x40U, /*!< L3 (IPv4) Header Checksum validation failed. */ 632 NETC_ETH_RX_L4_CKSUM_FAIL = 0x41U, /*!< L4 (TCP or UDP) Checksum validation failed. */ 633 NETC_ETH_RX_LGCPARITY_SRAM_MISMATCH = 0x80U, /*!< Internal logic parity or SRAM (ECC) mismatch detected. */ 634 NETC_ETH_RX_SYSBUS_READ_ERR = 0x88U, /*!< System Bus Read Error detected during processing of the frame. */ 635 NETC_ETH_RX_SYSBUS_WRITE_ERR = 0x89U /*!< System Bus Write Error detected during processing of the frame. */ 636 } Netc_Eth_Ip_RxStatusType; 637 638 /** @brief Shall represent the host reason for a received frame. 639 * Valid only in the first descriptor of a chain. 640 * implements Netc_Eth_Ip_HostReasonType_enum */ 641 typedef enum 642 { 643 NETC_ETH_IP_REGULAR_FRAME = 0U, /* Regular forwarded frame */ 644 NETC_ETH_IP_INGRESS_MIRRORING = 1U, /* Ingress mirroring */ 645 NETC_ETH_IP_MAC_LEARNING = 2U, /* MAC learning */ 646 NETC_ETH_IP_TIMESTAMP_RESPONSE = 3U, /* Timestamp Response */ 647 NETC_ETH_IP_SW_DEFINED_HOST_REASON = 8U /* Software defined Host Reason */ 648 } Netc_Eth_Ip_HostReasonType; 649 650 /** @brief This flag will indicate the presence of what additional fields in TX descriptor. 651 * Valid only in the first descriptor of a chain. 652 */ 653 typedef enum 654 { 655 NETC_ETH_IP_SWT_MANAGEMNT = 0x00U, /*!< Switch management optional fields are present. */ 656 NETC_ETH_IP_RESERVED_FLAG = 0x01U, /*!< Reserved value of the flag field. */ 657 NETC_ETH_IP_TXSTART = 0x02U /*!< TX_START field is present in the descriptor. */ 658 } Netc_Eth_Ip_TxOptionsFlagType; 659 660 /** 661 * @brief Action type which can be done through VSI to PSI messaging. 662 * 0x1234 -> first byte(12) - CLASS 663 * -> second byte(32) - COMMAND 664 * @internal 665 */ 666 typedef enum 667 { 668 NETC_ETH_IP_VSITOPSI_MAC_ADDR_SET = 0x0000U, /*!< VSI sent a set MAC command. */ 669 NETC_ETH_IP_VSITOPSI_ADD_RX_MAC_ADDR_FILTER = 0x0100U, /*!< VSI sent an add filter for a MAC command. */ 670 NETC_ETH_IP_VSITOPSI_DELETE_RX_MAC_ADDR_FILTER = 0x0101U, /*!< VSI sent a delete filter MAC command. */ 671 NETC_ETH_IP_VSITOPSI_ENABLE_MULTICAST = 0x1000U, /*!< VSI sent a request to enable multicast promiscuous mode. */ 672 NETC_ETH_IP_VSITOPSI_DISABLE_MULTICAST = 0x1010U, /*!< VSI sent a request to disable multicast promiscuous mode. */ 673 NETC_ETH_IP_VSITOPSI_CLOSE_FILTER = 0x1020U, /*!< VSI sent a request to stop all multicast traffic. */ 674 NETC_ETH_IP_VSITOPSI_GET_SYNC_STATE = 0x2000U /*!< VSI sent a request for the synchronization state */ 675 } Netc_Eth_Ip_VsiToPsiMsgActionType; 676 677 typedef enum { 678 NETC_ETH_IP_ENETCTABLE_REQFMT_ACTIONS_FIELD = 0U, /*!< first uint32 item of Enetc Tables Request Data Buffer Format */ 679 NETC_ETH_IP_ENETCTABLE_REQFMT_ENTRYID_FIELD, /*!< second uint32 item of Enetc Tables Request Data Buffer Format when ACCESS_METHOD = 0x0 (ENTRY_ID Match) */ 680 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA0, /*!< first item of CFGEDATA but third item of Enetc Tables Request Data Buffer Format */ 681 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA1, /*!< second item of CFGEDATA but forth item of Enetc Tables Request Data Buffer Format */ 682 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA2, /*!< third item of CFGEDATA but fifth item of Enetc Tables Request Data Buffer Format */ 683 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA3, /*!< forth item of CFGEDATA but sixth item of Enetc Tables Request Data Buffer Format */ 684 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but seventh item of Enetc Tables Request Data Buffer Format */ 685 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA5, /*!< sixth item of CFGEDATA but eighth item of Enetc Tables Request Data Buffer Format */ 686 NETC_ETH_IP_ENETCTABLE_REQFMT_CFGEDATA6 /*!< seventh item of CFGEDATA but ninth item of Enetc Tables Request Data Buffer Format */ 687 } Netc_Eth_Ip_EnetcTableRequestDataIndexType; 688 689 /*! 690 * @brief Query action enum types for tables in Enetc. 691 */ 692 typedef enum { 693 NETC_ETH_TABLES_FULL_QUERY = 0x0U, /*!< Full Query */ 694 NETC_ETH_TABLES_ENTRY_ID_QUERY = 0x1U /*!< Entry_Id query only */ 695 } Netc_Eth_Ip_TablesQueryActionType; 696 697 /*! 698 * @brief defines access method type. 699 */ 700 typedef enum { 701 NETC_ETH_ENTRY_ID_MATCH = 0x0U, /*!< if entry id match */ 702 NETC_ETH_EXACT_MATCH_KEY_ELEMENT_MATCH, /*!< if exact match key element match */ 703 NETC_ETH_SEARCH_METHOD, /*!< search method */ 704 NETC_ETH_TERNARY_MATCH_KEY_ELEMENT_MATCH /*!< if ternary match key element */ 705 } Netc_Eth_Ip_AccessMethodType; 706 707 /*! 708 * @brief defines commands type. 709 * 710 */ 711 typedef enum { 712 NETC_ETH_DELETE_CMD = 0x1U, /*!< delete command */ 713 NETC_ETH_UPDATE_CMD = 0x2U, /*!< update command */ 714 NETC_ETH_QUERY_CMD = 0x4U, /*!< query command*/ 715 NETC_ETH_QUERY_FOLLOWEDBY_DELETE_CMD = 0x5U, /*!< query followed by delete command */ 716 NETC_ETH_QUERY_FOLLOWEDBY_UPDATE_CMD = 0x6U, /*!< query followed by update command */ 717 NETC_ETH_ADD_CMD = 0x8U, /*!< add a command */ 718 NETC_ETH_ADD_OR_UPDATE_CMD = 0xAU, /*!< add or update a command */ 719 NETC_ETH_ADD_FOLLOWEDBY_QUERY_CMD = 0xCU, /*!< add followed by query command */ 720 NETC_ETH_ADD_FOLLOWEDBY_QUERY_FOLLOWEDBY_UPDATE_CMD = 0xEU /*!< add followed by query followed by update command */ 721 } Netc_Eth_Ip_CommandsType; 722 723 /*! 724 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 725 */ 726 typedef enum { 727 NETC_ETH_IP_REQHEADER_ADDR_L = 0x0U, /*!< a 16-byte aligned low part of memory address for a table, offset: 0x0 */ 728 NETC_ETH_IP_REQHEADER_ADDR_H = 0x1U, /*!< a 16-byte aligned high part of memory address for a table, offset: 0x1 */ 729 NETC_ETH_IP_REQHEADER_LENGTHFIELD = 0x2U, /*!< request and response buffer length in Request Header, offset: 0x2 */ 730 NETC_ETH_IP_REQHEADER_CONFIGFIELD = 0x3U, /*!< config field includes Table id, access method, command etc. in Request Header, offset: 0x3 */ 731 NETC_ETH_IP_REQHEADER_NPFFIELD = 0x7U /*!< NPF field in Request Header, offsext: 0x7 */ 732 } Netc_Eth_Ip_NTMPReqHeaderFormatIndexType; 733 734 /*! 735 * @brief NTMP1 command descriptor format index enum for buffer descriptors of command rings. 736 */ 737 typedef enum { 738 NETC_ETH_IP_CBD_ADDR_L = 0x00U, 739 NETC_ETH_IP_CBD_ADDR_H = 0x01U, 740 NETC_ETH_IP_CBD_DATA_1 = 0x02U, 741 NETC_ETH_IP_CBD_DATA_2 = 0x03U, 742 NETC_ETH_IP_CBD_DATA_3 = 0x04U, 743 NETC_ETH_IP_CBD_DATA_4 = 0x05U, 744 NETC_ETH_IP_CBD_LENGTH_INDEX = 0x06U, 745 NETC_ETH_IP_CBD_CMD = 0x07U 746 } NetcEth_Ip_ReqHeaderNTMP1TableOperationDataType; 747 748 /*! 749 * @brief enum type for administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry. 750 * implements Netc_Eth_Ip_AdminGateOperationType_enum 751 */ 752 typedef enum { 753 NETC_ETH_HOST_REQUEST_UNCHANGED, /*!< 0x0: SetGateStates. HoldRequest is unchanged. */ 754 NETC_ETH_HOST_REQUEST_HOLD, /*!< 0x1: Set-And-Hold-MAC. HoldRequest is set to value hold (1). */ 755 NETC_ETH_HOST_REQUEST_RELEASE /*!< 0x2: Set-And-Release-MAC. HoldRequest is set to value release (0). */ 756 } Netc_Eth_Ip_AdminGateOperationType; 757 758 /*! 759 * @brief enum type for Administrative Traffic Class Gate States. 760 */ 761 typedef enum { 762 NETC_ETH_TRAFFIC_CLASS_GATE_CLOSED, /*!< 0x0: Gate closed. */ 763 NETC_ETH_TRAFFIC_CLASS_GATE_OPEN /*!< 0x1: Gate open. */ 764 } Netc_Eth_Ip_AdminTrafficClassGateStateType; 765 766 /*! 767 * @brief Eth Rate policer Table Service Data Unit enum type. 768 */ 769 typedef enum 770 { 771 NETC_ETH_IP_PPDU = 0U, /*!< Physical Layer PDU */ 772 NETC_ETH_IP_MPDU = 1U, /*!< MAC PDU */ 773 NETC_ETH_IP_MSDU = 2U, /*!< MAC SDU */ 774 NETC_ETH_IP_RSDTYPE = 3U /* reservered type */ 775 }Netc_Eth_Ip_SDUType; 776 777 /*! 778 * @brief Ingress Port Filter Table CFGE_DATA format enum type. Netc_Eth_Ip_IngressPortFilterTableCFGEDataIndexType 779 */ 780 typedef enum { 781 NETC_ETH_IP_INGRESSPORTFILTER_CFGE_CONFIG_FIELD = 54U, /*!< CONFIG field includes IPV, DR, FLTFA etc in Ingress Port Filter Table CFGE_DATA Format */ 782 NETC_ETH_IP_INGRESSPORTFILTER_CFGE_FLTATGT_FIELD = 55U /*!< FLTA_TGT (Target For Selected Filter Action) field in Ingress Port Filter Table CFGE_DATA Format */ 783 } Netc_Eth_Ip_IngressPortFilterTableCFGEDataIndexType; 784 785 /*! 786 * @brief enum type for Filter Forwarding Action field data type of IPF table. 787 */ 788 typedef enum { 789 NETC_ETH_IPF_DISCARDFRAMES, /*!< 0x0: discard frames. */ 790 NETC_ETH_IPF_PERMITFRAMES /*!< 0x1: permit frames. */ 791 } Netc_Eth_Ip_IPFFilterForwardingActionDataType; 792 793 /*! 794 * @brief enum type for Filter Action field data type of IPF table. 795 */ 796 typedef enum { 797 NETC_ETH_IPF_NOACTION, /*!< 0x0: no actions. */ 798 NETC_ETH_IPF_SENDTOSPECIFICSIS /*!< 0x1: sending to a specific SIs. */ 799 } Netc_Eth_Ip_IPFFilterActionDataType; 800 801 /*================================================================================================== 802 * STRUCTURES AND OTHER TYPEDEFS 803 ==================================================================================================*/ 804 /** @brief Callback function invoked when a general event is encountered. */ 805 typedef void (*Netc_Eth_Ip_CallbackType)(uint8 Controller); 806 807 /** @brief Signature of the callback function invoked when a specific queue event is encountered */ 808 typedef void (*Netc_Eth_Ip_ChCallbackType)(uint8 Controller, uint8 Ring); 809 810 /*! 811 * @brief NTMP request and response message header format for buffer descriptors of command rings. 812 */ 813 typedef struct { 814 uint32 MessageHeaderDataField[8U]; /*!< used for both request and response message header data format */ 815 } Netc_Eth_Ip_NTMPMessageHeaderFormatType; 816 817 /*! 818 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 819 */ 820 typedef struct { 821 uint16 ReqBuffLength; /*!< Table Request data buffer length field of NTMP Request Message Header Data Format */ 822 uint16 RspBuffLength; /*!< Table Response data buffer length field of NTMP Request Message Header Data Format */ 823 uint8 CmdCompletionInt; /*!< CCI (Command Completion Interrupt) in config field of Request Message Header Data Format */ 824 uint8 Version; /*!< Protocol Version in config field of Request Message Header Data Format */ 825 uint8 TableId; /*!< TABLE_ID in config field of Request Message Header Data Format */ 826 Netc_Eth_Ip_AccessMethodType AccessMethod; /*!< ACCESS_METHOD in config field of Request Message Header Data Format */ 827 Netc_Eth_Ip_CommandsType Cmd; /*!< COMMAND in config field of Request Message Header Data Format */ 828 } NetcEth_Ip_ReqHeaderTableOperationDataType; 829 830 /*! 831 * @brief NTMP V1.0 entry set message header format index enum for buffer descriptors of command rings. 832 */ 833 typedef struct { 834 uint32 Data0; /*!< */ 835 uint32 Data1; /*!< */ 836 uint16 SI_Bitmap; /*!< */ 837 uint16 Index; /*!< */ 838 uint16 Length; /*!< */ 839 uint8 Format; /*!< */ 840 uint8 Class; /*!< */ 841 uint8 Command; /*!< */ 842 } NetcEth_Ip_SetMessageHeaderTableOperationDataType; 843 844 845 /** @brief Station interface command buffer description. */ 846 typedef struct 847 { 848 Netc_Eth_Ip_NTMPMessageHeaderFormatType *commandBDAddr; /*!< Address where command buffer descriptor will be saved. The address must be 128 byte aligned. */ 849 uint8 lengthCBDR; /*!< Number of command buffer descriptors ring. */ 850 } Netc_Eth_Ip_CommandBDType; 851 852 853 /** @brief Message configuration structure.Should be a multiple of 32 bytes. */ 854 typedef struct 855 { 856 uint8 Class; /*!< Class of the command. */ 857 uint8 Command; /*!< Type of command. */ 858 uint8 Data[30U]; /*!< Data. */ 859 } Netc_Eth_Ip_VsiToPsiMsgType; 860 861 /** @brief Transmit buffer descriptor. */ 862 typedef struct 863 { 864 uint32 dataBuffAddr; /*!< Address where the data for transmit operation is stored. */ 865 const uint32 RESERVED_0; /*!< UNUSED! Only used for the system with address spaces on 64 bits. */ 866 uint32 length; /*!< Length of data buffer(it will be in bytes). */ 867 uint32 buffConfig; /*!< Buffer descriptor configuration for a normal descriptor. */ 868 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 869 uint32 timestamp; /*!< Timestamp value used to update packet header field on transmission. */ 870 uint32 extendVlanBuffConfig; /*!< VLAN specific configuration. */ 871 const uint32 RESERVED_1; /*!< UNUSED! Not configured by hardware! */ 872 uint32 extendBuffConfig; /*!< Buffer descriptor configuration for an extended descriptor. */ 873 #endif 874 } Netc_Eth_Ip_TxBDRType; 875 876 /** @brief Transmit buffer descriptor writeback. */ 877 typedef struct 878 { 879 const uint32 Timestamp; /*!< Address where the data for transmit operation is stored. */ 880 const uint16 TxTimestampID; /*!< UNUSED! Only used for the system with address spaces on 64 bits. */ 881 const uint16 RESERVED_0; /*!< UNUSED! */ 882 const uint32 RESERVED_1; /*!< UNUSED! */ 883 const uint16 RESERVED_2; /*!< UNUSED! */ 884 const uint16 FlagsAndStatus; /*!< Buffer descriptor configuration for a normal descriptor. */ 885 } Netc_Eth_Ip_TxBDRWritebackType; 886 887 888 /** @brief Transmit Timestamp Reference Response Buffer Descriptor Format. */ 889 typedef struct 890 { 891 const uint32 Timestamp; /*!< Timestamp; synchronized timestamp or a free running timestamp */ 892 const uint32 RESERVED_0; /*!< UNUSED! */ 893 const uint16 TxTimestampID; /*!< Transmit Timestamp Identifier. */ 894 const uint16 RESERVED_1; /*!< UNUSED! */ 895 const uint16 HostReason; /*!< Host Reason 0: Regular forwarded frame 896 1: Ingress mirroring 897 2: MAC learning 898 3: Timestamp Response 899 4-7: Reserved 900 8-15: Software defined Host Reason */ 901 const uint16 FlagsAndErrorStat; /*!< Final flag + Ready flag + Error status code for the received frame. */ 902 } Netc_Eth_Ip_TxTimestampResponseType; 903 904 /** 905 * @brief Transmit internal buffer descriptor. 906 * @details The fildes of this stucture are generic. 907 * - at initialization the first 2 words are used to store the location in which the receive frame will be stored; 908 * - after a frame is received information will be conform with the reference manual. 909 */ 910 typedef struct 911 { 912 uint32 configRxBD[4]; /*!< Generic configuration of a Rx BDR. */ 913 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 914 uint32 extendConfigRxBD[4]; /*!< Extended generic configuration of a Rx BDR. */ 915 #endif 916 } Netc_Eth_Ip_RxBDRType; 917 918 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 919 /** 920 * @brief VLAN specific configuration. 921 */ 922 typedef struct 923 { 924 Netc_Eth_Ip_VlanProtocolIdentifierType ProtocolIdentifier; /*! Tag protocol identifier. */ 925 uint8 PriorityCodePoint; /*! Priority code. */ 926 boolean DropIndicator; /*! Indicate frames eligible to be dropped in the presence of congestion. */ 927 uint16 VlanIdentifier; /*! The VLAN identifier is a 12-bit field specifying the VLAN to which the frame belongs. */ 928 } Netc_Eth_Ip_VlanType; 929 #endif 930 931 /*! 932 * @brief defines Gate Entry Admin Control List Data type for Time Gate Scheduling Table. 933 * implements Netc_Eth_Ip_GateEntryAdminControlListDataType_structure 934 */ 935 typedef struct 936 { 937 uint32 AdminTimeInterval; /*!< Administrative Time Interval for Gate Entry */ 938 uint8 AdminTrafficClassGateStates; /*!< Administrative Traffic Class Gate States for Gate Entry */ 939 Netc_Eth_Ip_AdminGateOperationType AdminGateOperationType; /*!< Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 940 } Netc_Eth_Ip_GateEntryAdminControlListDataType; 941 942 /*! 943 * @brief defines Time Gate Scheduling Table entries for ENETC. 944 * implements Netc_Eth_Ip_TimeGateSchedulingEntryDataType_structure 945 */ 946 typedef struct 947 { 948 uint32 TimeGateSchedulingTable_EID; /*!< Time Gate Scheduling Table Entry ID, which is actually the port index of switch */ 949 uint64 AdminBaseTime; /*!< Administrative Base Time */ 950 uint32 AdminCycleTime; /*!< Administrative Cycle Time */ 951 uint32 AdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 952 uint16 AdminControlListLength; /*!< Administrative Control List Length */ 953 Netc_Eth_Ip_GateEntryAdminControlListDataType GateEntryAdminControlListData[NETC_ETH_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; 954 } Netc_Eth_Ip_TimeGateSchedulingEntryDataType; 955 956 /*! 957 * @brief defines VLAN Address Filter Table entries for ENETC. 958 * implements Netc_Eth_Ip_VLANFilterTableEntryDataType_structure 959 */ 960 typedef struct 961 { 962 uint16 VLANFilterTable_EID; /*!< VLAN Filter Table Entry ID */ 963 uint16 VLANId; /*!< VLAN ID used for filtering */ 964 Netc_Eth_Ip_VlanProtocolIdentifierType TPID; /*!< TPID used for filtering */ 965 uint16 SIBitmap; /*!< Bitmap of the SIs for which the filter is used */ 966 } Netc_Eth_Ip_VLANFilterTableEntryDataType; 967 968 /** 969 * @brief Receive Flow Steering configuration data type. 970 * @details Structure used to define the attributes of a RFS entry. 971 * implements Netc_Eth_Ip_RfsEntryType_structure 972 */ 973 typedef struct 974 { 975 uint8 RfsTableEntryId; /*!< RFS Table Entry ID */ 976 uint8 Enable; /*!< RFS Entry Enable bit. When set the entry is valid. */ 977 uint8 Mode; /*!< Defines the steering mode: Discard/drop, steer to group or steer to BDR (within an SI). */ 978 uint8 Result; /*!< Represents either group or BDR, as defined by Mode attribute. */ 979 uint8 IpPresent; /*!< If set, IP header is present */ 980 uint8 IpPresentMask; /*!< Mask field programmable for comparison. */ 981 uint8 L4ProtPresent; /*!< If set L4 protocol is present. */ 982 uint8 L4ProtPresentMask; /*!< Mask field programmable for comparison. */ 983 uint8 TcpUdpPresent; /*!< If set TCP header or UDP header is present. */ 984 uint8 TcpUdpPresentMask; /*!< Mask field programmable for comparison. */ 985 uint8 Ipv4Ipv6; /*!< If set (1) IP addresses are IPV4 addresses, if cleared (0) IP addresses are IPV6 addresses. */ 986 uint8 Ipv4Ipv6Mask; /*!< Mask field programmable for comparison. */ 987 uint8 UdpTcp; /*!< If set (1) UDP header, if cleared (0) TCP header. */ 988 uint8 UdpTcpMask; /*!< Mask field programmable for comparison. */ 989 uint8 L4ProtocolMask; /*!< Mask field programmable for comparison. */ 990 uint8 L4Protocol; /*!< Indicates which L4 protocol is encapsulated. */ 991 uint32 L4DestPortMask; /*!< Mask field programmable for comparison. */ 992 uint32 L4DestPort; /*!< Destination port. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 993 uint32 L4SrcPortMask; /*!< Mask field programmable for comparison. */ 994 uint32 L4SrcPort; /*!< Source port. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 995 uint64 DestIpAddrMaskLow; /*!< Mask field programmable for comparison. */ 996 uint64 DestIpAddrMaskHigh; /*!< Mask field programmable for comparison. */ 997 uint64 DestIpAddrLow; /*!< IPv4/IPv6 destination address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 998 uint64 DestIpAddrHigh; /*!< IPv4/IPv6 destination address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 999 uint64 SrcIpAddrMaskLow; /*!< Mask field programmable for comparison. */ 1000 uint64 SrcIpAddrMaskHigh; /*!< Mask field programmable for comparison. */ 1001 uint64 SrcIpAddrLow; /*!< IPv4/IPv6 source address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1002 uint64 SrcIpAddrHigh; /*!< IPv4/IPv6 source address. Defined in network byte order (big-endian). MSB of port nb is stored at LSB offset of this field.*/ 1003 } Netc_Eth_Ip_RfsEntryType; 1004 1005 /*! 1006 * @brief Eth Rate Policer Table CFGE_DATA Format. 1007 */ 1008 typedef struct { 1009 uint32 Cfge_Cir; /*!< Committed Information Rate (CIR) field */ 1010 uint32 Cfge_Cbs; /*!< Committed Burst SizeExpressed (CBS) field */ 1011 uint32 Cfge_Eir; /*!< Excess Information Rate (EIR) field */ 1012 uint32 Cfge_Ebs; /*!< Excess Burst Size (EBS) field */ 1013 boolean Cfge_Mren; /*!< Mark All Frames Red Enable, 0:disable, 1:enable */ 1014 boolean Cfge_Doy; /*!< Drop on Yellow, 0:not dropped, 1:dropped */ 1015 boolean Cfge_Cm; /*!< Color mode, 0:color blind, 1:color aware */ 1016 boolean Cfge_Cf; /*!< Coupling flag, 0:C and E token buckets are not coupled. 1:C and E token buckets are coupled*/ 1017 boolean Cfge_Ndor; /*!< No Drop on Red, 0:frames marded "red" are alwayts dropped, 1: not dropped */ 1018 Netc_Eth_Ip_SDUType Cfge_SduType; /*!< Service Data Unit Type */ 1019 } Netc_Eth_Ip_RatePolicerTableCFGEDataType; 1020 1021 /*! 1022 * @brief Rate Eth Policer Table STSE_DATA Format. 1023 */ 1024 typedef struct { 1025 uint64 Stse_ByteCount; /*!< Number of bytes received by the rate policer instance */ 1026 uint32 Stse_DropFrames; /*!< Number of frames dropped by the rate policer instance */ 1027 uint32 Stse_Dr0GrnFrames; /*!< Number of frames marked green with DR=0 by the rate policer instance */ 1028 uint32 Stse_Dr1GrnFrames; /*!< Number of frames marked green with DR=1 by the rate policer instance */ 1029 uint32 Stse_Dr2YlwFrames; /*!< Number of frames marked yellow with DR=2 by the rate policer instance */ 1030 uint32 Stse_RemarkYlwFrames; /*!< Number of frames re-marked from green to yellow by the rate policer instance */ 1031 uint32 Stse_Dr3RedFrames; /*!< Number of frames marked red (DR=3) by the rate policer instance */ 1032 uint32 Stse_RemarkRedFrames; /*!< Number of frames re-marked from green or yellow to red by the rate policer instance */ 1033 uint32 Stse_Lts; /*!< Last timestamp */ 1034 uint32 Stse_CommittedTokenBucketInteger; /*!< Committed token bucket contents, integer portion */ 1035 uint32 Stse_CommittedTokenBucketFractional; /*!< Committed token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BCS) */ 1036 uint32 Stse_ExcessTokenBucketInteger; /*!< Excess token bucket contents, integer portion (32 bits)*/ 1037 uint32 Stse_ExcessTokenBucketFranctional; /*!< Excess token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BES) */ 1038 } Netc_Eth_Ip_RatePolicerTableSTSEDataType; 1039 1040 /*! 1041 * @brief defines Eth Rate Policer entries. 1042 * 1043 */ 1044 typedef struct 1045 { 1046 uint32 RatePolicerEntryId; /* Entry ID */ 1047 Netc_Eth_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1048 boolean ConfigurationElementUpdate; /* Update Actions, CFGEU */ 1049 boolean FunctionalEnableElementUpdate; /* Update Actions, FEEU */ 1050 boolean PolicerStateElementUpdate; /* Update Actions, PSEU */ 1051 boolean StatisticsElementUpdate; /* Update Actions, STSEU */ 1052 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1053 } Netc_Eth_Ip_RatePolicerEntryDataType; 1054 1055 /*! 1056 * @brief defines Eth Rate Policer entry response data. 1057 * 1058 */ 1059 typedef struct 1060 { 1061 uint32 RatePolicerEntryId; /* Entry ID */ 1062 Netc_Eth_Ip_RatePolicerTableSTSEDataType RatePolicerStseData; /* Statistics Element Data */ 1063 Netc_Eth_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1064 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1065 boolean MarkRedFlag; /* 0b = Indicates that the rate policer blocking "mark all frames red" function has not been triggered */ 1066 /* 1b = Indicates that all frames arriving at this rate policer are marked red by the rate policer blocking "mark all frames red" function. */ 1067 } Netc_Eth_Ip_RatePolicerEntryRspDataType; 1068 1069 /*! 1070 * @brief Request and Response Data Buffer Format of Tables supported by ENETC. 1071 */ 1072 typedef struct { 1073 uint32 TableDataField[NETC_ETH_IP_TABLEDATA_BUFFER_LENGTH]; /*!< the request and response data buffer share the same memory */ 1074 } Netc_Eth_Ip_EnetcTableDataType; 1075 1076 /** 1077 * @brief Everything that can be configured by the PSI for itself(also Port) or for the VSIs. 1078 * @details This structure contains general configuration of the NETC for Ethernet driver. 1079 * This will affect also every VSI configured aftwareds in other projects. Please, be aware that this will affect all other cotrollers used. 1080 */ 1081 typedef struct 1082 { 1083 /* General configurations of SI. */ 1084 uint8 siId; /*< The index of the SI */ 1085 boolean enableSi; /*< Enable/disable the SI. */ 1086 uint8 NumberOfRxBDR; /*< The number of allowed RX BDR */ 1087 uint8 NumberOfTxBDR; /*< The number of allowed TX BDR */ 1088 uint8 SIBandwidthWeight; /*< SI Bandwidth Weight */ 1089 uint8 numberOfMSIs; /*< The number of assigned MSIs */ 1090 uint8 priorityToTrafficClassMapping[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*< Port station interface a configuration register 1 (PSI1CFGR1 - PSI7CFGR1). 1091 The field will not be used for PSI0 */ 1092 /** TODO: other fields from Port station interface 0 configuration register 0 (PSI0CFGR0) */ 1093 /* MAC configurations */ 1094 uint8 primaryMACAddress[6U]; /*< The primary MAC address of the SI. For PSI0 this actually gets written in PMAR0 and PMAR1 */ 1095 /* TODO: Permission to change MAC address Boolean */ 1096 /* TODO: MAC filtering configuration */ 1097 1098 /* VLAN configurations */ 1099 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1100 boolean EnableSIVlan; /*! SI-based VLAN information is added on transmit and removed on receive if matched (PSIaVLANR). */ 1101 Netc_Eth_Ip_VlanType SiVLANConfig; /*!< Vlan configuration for each SI-based */ 1102 boolean EnableSoftwareVlanInsert; /*!< Enable Software VLAN Insertion (PSICFGR0[SIVIE]) */ 1103 uint8 SIVlanControl; /*!< Determines which VLAN Ethertypes can be inserted by the SI driver (PSICFGR0[SIVC]) */ 1104 boolean EnableVLANTagExtract; /*!< Controls whether SI-based VLAN tag is removed from the frame before delivery to the SI(PSICFGR0[VTE]) */ 1105 #endif 1106 boolean enableAntiSpoofing; /*< Enable or disable the Anti-Spoofing */ 1107 1108 /*SI Runtime permissions */ 1109 boolean changeMACAllowed;/* Permission to change VLAN membership Boolean */ 1110 boolean hashFilterUpdateAllowed;/* Permission to update VLAN filtering configuration */ 1111 boolean multicastPromiscuousChangeAllowed; /*Permission to enable Multicast Promiscuos mode */ 1112 1113 /* boolean enableMulticastVLANPromiscuosMode; Enable or disable the Multicast VLAN Promiscuos Mode */ 1114 /* boolean enableUnicastVLANPromiscuosMode; Enable or disable the Unicast VLAN Promiscuos Mode */ 1115 1116 } Netc_Eth_Ip_GeneralSIConfigType; 1117 /** @endcond DRIVER_INTERNAL_USE_ONLY */ 1118 1119 1120 /** @brief Each enum value will be guarded by a define if this is present on the platform 1121 * implements Netc_Eth_Ip_PcieFunction_enum 1122 */ 1123 typedef enum 1124 { 1125 TIMER = 0U, 1126 EMDIO, 1127 SWITCH, 1128 ENETC, 1129 PSI, 1130 VSI 1131 } Netc_Eth_Ip_PcieFunction; 1132 1133 /** @brief Structure that contain the name of PCIe function and the Error Status corresponding to this function. 1134 * For the StatusError, the first 3 bits are set based on the following rule: 1135 * - if a fatal error happened, bit number 0 is set. 1136 * - if a non fatal error happened, bit number 1 is set. 1137 * - if a correctable error happened, bit number 2 is set. 1138 */ 1139 typedef struct 1140 { 1141 Netc_Eth_Ip_PcieFunction Function; 1142 uint8 StatusErrors; 1143 } Netc_Eth_Ip_PcieFunctionErrorsReported; 1144 1145 /** @brief Signature of the callback function invoked when a specific error event is encountered in PCIE AER 1146 * 1147 * First parameter will always be returned as 0, since PSI0 is the only SI responsable with this feature. 1148 * The second pamameter is a list of fixed size of structures. Each structure has a function name(Netc_Eth_Ip_PcieFunction enum) 1149 * and a status corresponding to the function. 1150 * The codification of the status error is: 1151 * - if a fatal error happened, bit number 0 is set. 1152 * - if a non fatal error happened, bit number 1 is set. 1153 * - if a correctable error happened, bit number 2 is set. 1154 */ 1155 typedef void (*Netc_Eth_Ip_PcieAerErrorReportingCallbackType)(const uint8 ctrlIndex, const Netc_Eth_Ip_PcieFunctionErrorsReported *options); 1156 1157 /** 1158 * @brief Credit based shaper configuration. 1159 * @note Not supported yet. 1160 */ 1161 typedef struct 1162 { 1163 /* To improve the speed of the init of the drivers, Bandwidth and hiCredit are calculated in the upper layes */ 1164 boolean EthEgressCBShaperEnable; /*!< Enable the Credit-Based Shaper. */ 1165 uint32 EthEgressCBShaperBandwidth; /*!< Bandwidth of the Credit-Based Shaper. Bandwidth = (idleSlope/portTxRate) * 100, Note: total CBS bandwidth should be less than 75% */ 1166 uint32 EthEgressHiCredit; /*!< HiCredit if the Credit-Based Shaper. (hiCredit on credit) = maxSizedFrame * Bandwidth * (enetClockFrequency / portTxRate) */ 1167 uint32 EthMaxSizedFrame; /*!< Max Frame Size, should be less the 1536 bytes */ 1168 } Netc_Eth_Ip_CreditBasedShaperConfigType; 1169 1170 /*! 1171 * @brief defines Ingress Port Filter Table CFGE_DATA type. 1172 */ 1173 typedef struct 1174 { 1175 uint32 CfgeTargetForSelectedFilterAction; /*!< FLTA_TGT filed in CFGE_DATA format */ 1176 uint8 CfgeIpv; /*!< IPV (internal priority value) filed in CFGE_DATA format */ 1177 uint8 CfgeDr; /*!< DR (drop resilience) field in CFGE_DATA format */ 1178 uint8 CfgeRelativePrecedentResolution; /*!< RPR field in CFGE_DATA format */ 1179 boolean CfgeOverrideIpv; /*!< OIPV (override internal priority value) field in CFGE_DATA format*/ 1180 boolean CfgeOverrideDr; /*!< ODR (override drop resilience) field in CFGE_DATA format */ 1181 boolean CfgeWakeOnLanTriggerEnable; /*!< WOLTE filed in CFGE_DATA format */ 1182 Netc_Eth_Ip_CfgeFilterForwardingActionDataType CfgeFilterForwardingAction; /*!< FLTFA field in CFGE_DATA format */ 1183 Netc_Eth_Ip_CfgeFilterActionDataType CfgeFilterAction; /*!< FLTA field in CFGE_DATA format */ 1184 } Netc_Eth_Ip_IngressPortFilterCfgeDataType; 1185 1186 /*! 1187 * @brief defines Ingress Port Filter Table KEYE_DATA type. 1188 * implements Netc_Eth_Ip_IngressPortFilterKeyeDataType_structure 1189 */ 1190 typedef struct 1191 { 1192 uint16 KeyePrecedence; /*!< Precedence field */ 1193 uint16 keyeFrmAttributeFlags; /*!< Frame Attribute Flags field */ 1194 uint16 KeyeFrmAttributeFlagsMask; /*!< Frame Attribute Flags Mask field */ 1195 uint8 KeyeDifferentiatedServicesCodePoint; /*!< Differentiated Services Code Point field */ 1196 uint8 KeyeDifferentiatedServicesCodePointMask; /*!< Differentiated Services Code Point Mask field */ 1197 uint16 KeyeOuterVLANTagControlInformation; /*!< Outer VLAN Tag Control Information field */ 1198 uint16 KeyeOuterVLANTagControlInformationMask; /*!< Outer VLAN Tag Control Information Mask field */ 1199 uint8 KeyeDstMacAddr[6U]; /*!< Destination MAC Address field */ 1200 uint8 KeyeDstMacAddrMask[6U]; /*!< Destination MAC Address Mask field */ 1201 uint8 KeyeSrcMacAddr[6U]; /*!< Source MAC Address field */ 1202 uint8 KeyeSrcMacAddrMask[6U]; /*!< Source MAC Address Mask field */ 1203 uint16 KeyeInnerVLANTagControlInformation; /*!< Inner VLAN Tag Control Information field */ 1204 uint16 KeyeInnerVLANTagControlInformationMask; /*!< Inner VLAN Tag Control Information Mask field */ 1205 uint16 KeyeEtherType; /*!< EtherType field */ 1206 uint16 KeyeEtherTypeMask; /*!< EtherType Mask field */ 1207 uint8 KeyeIPProtocol; /*!< IP Protocol field */ 1208 uint8 KeyeIPProtocolMask; /*!< IP Protocol Mask field */ 1209 uint32 KeyeIPSourceAddress[4U]; /*!< IP Source Address field */ 1210 uint32 KeyeIPSourceAddressMask[4U]; /*!< IP Source Address Mask field */ 1211 uint16 KeyeL4SourcePort; /*!< L4 Source Port field */ 1212 uint16 KeyeL4SourcePortMask; /*!< L4 Source Port Mask field */ 1213 uint32 KeyeIPDestinationAddress[4U]; /*!< IP Destination Address field */ 1214 uint32 KeyeIPDestinationAddressMask[4U]; /*!< IP Destination Address Mask field */ 1215 uint16 KeyeL4DestinationPort; /*!< L4 Destination Port field */ 1216 uint16 KeyeL4DestinationPortMask; /*!< L4 Destination Port Mask field */ 1217 uint8 KeyePayloadBytes[24U]; /*!< Payload Bytes field */ 1218 uint8 KeyePayloadBytesMask[24U]; /*!< Payload Bytes Mask field */ 1219 } Netc_Eth_Ip_IngressPortFilterKeyeDataType; 1220 1221 /*! 1222 * @brief defines Ingress Port Filter Table entries. 1223 * implements Netc_Eth_Ip_IngressPortFilterEntryDataType_structure 1224 */ 1225 typedef struct 1226 { 1227 uint32 IngressPortFilterEntryID; /*!< Ingress Port Filter Table Entry ID */ 1228 Netc_Eth_Ip_IngressPortFilterCfgeDataType IngressPortFilterCfgeData; /*!< Ingress Port Filter Table CFGE_DATA format */ 1229 Netc_Eth_Ip_IngressPortFilterKeyeDataType IngressPortFilterkeyeData; /*!< Ingress Port Filter Table KEYE_DATA format */ 1230 uint64 IngressPortFilterMatchCount; /*!< Ingress Port Filter Table Match Count Data */ 1231 } Netc_Eth_Ip_IngressPortFilterEntryDataType; 1232 1233 /*! @brief Enetc general configuration. To be applied by the PSI for the whole Enetc controller part. */ 1234 typedef struct 1235 { 1236 uint8 numberOfConfiguredSis; /*!< The number of enabled SIs */ 1237 const Netc_Eth_Ip_GeneralSIConfigType (*stationInterfaceGeneralConfig)[FEATURE_NETC_ETH_NUMBER_OF_CTRLS]; /*!< The general configuration for all the enabled SIs */ 1238 volatile Netc_Eth_Ip_VsiToPsiMsgType const *RxVsiMsgCmdToPsi[FEATURE_NETC_ETH_NUM_OF_VIRTUAL_CTRLS]; /*!< Array of addresses where PSI will store the receive message from VSI. */ 1239 /* boolean enablePortOuterVlan; PONVLANR */ /** SI-based VLAN information is added on transmit and removed on receive if matched. */ 1240 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1241 /* boolean useNativePortOuterVlan; PONVLANR - PNE bitfield */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1242 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1243 /* Netc_Eth_Ip_VlanType *portInnerVLANConfig; TODO: Decide if this will be used at runtime or given in configuration. */ 1244 /* boolean enableInnerOuterVlan; PINVLANR */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1245 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1246 /* boolean useNativePortInnerVlan; PINVLANR - PNE bitfield */ /*! SI-based VLAN information is added on transmit and removed on receive if matched. */ 1247 /* TODO: Decide if this will be used at runtime or given in configuration. */ 1248 /* Netc_Eth_Ip_VlanType *portOuterVLANConfig; TODO: Decide if this will be used at runtime or given in configuration. */ 1249 /* TBD: Port VLAN classification control register (PVCLCTR) */ 1250 /* TBD: Parse configuration (several registers) */ 1251 /* TBD: Port pause configuration */ 1252 /* TBD: Port station interface VLAN filtering mode register (PSIVLANFMR) */ 1253 Netc_Eth_Ip_ICMType priorityToICM[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of internal priority to ICM. Receive IPV to ICM priority mapping register 0 (IPV2ICMPMR0) */ 1254 uint8 priorityToTrafficClassic[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of transmit BD rings priority to traffic class. Transmit priority to traffic class mapping register 0 (PRIO2TCMR0) */ 1255 uint8 pcpToIpv[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Mapping of Pcp from VLAN Tag to internal priority. VLAN to IPV mapping profile a register 0 (VLANIPVMP0R0 - VLANIPVMP1R0) */ 1256 /* TBD: VLAN to DR mapping profile a register (VLANDRMP0R - VLANDRMP1R) */ 1257 /* TBD: All the tables */ 1258 uint8 portPPDUByteCountOverhead; /* PPDU Byte count overhead which includes IPG, SFD and Preamble. */ 1259 uint8 portMACSecByteCountOverhead; /* Number of bytes of overhead due to MACSec encapsulation */ 1260 uint32 portTimeGateSchedulingAdvanceTimeOffsetReg; /* This is the port time gate scheduling advance time offset register */ 1261 boolean portTimeAwareShaperEnable; /*!< If the data for time gate scheduling talbe is configured */ 1262 uint64 portEgressAdminBaseTime; /*!< Administrative Base Time */ 1263 uint32 portEgressAdminCycleTime; /*!< Administrative Cycle Time */ 1264 uint32 portEgressAdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 1265 uint8 numberOfGateControlListEntries; /*!< Number of entries in Administrative Gate Control list. */ 1266 Netc_Eth_Ip_GateEntryAdminControlListDataType (*TimeGateControlListEntries)[NETC_ETH_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; /*!< Pointer to an array containing the gate control list for port. */ 1267 #if (NETC_ETH_MAX_NUMBER_OF_IPFTABLE_LIST > 0U) 1268 uint8 numberOfIPFTableList; /*!< Number of ingress port filter table entries in list. */ 1269 Netc_Eth_Ip_IngressPortFilterEntryDataType (*IngressPortFilterTableList)[NETC_ETH_MAX_NUMBER_OF_IPFTABLE_LIST]; /*!< Pointer to an array containing the ingress port filter table entries list. */ 1270 #endif 1271 /* ------------ Port configuration ------------- */ 1272 /* TBD: Port configuration register (PCR) - low priority for basic driver */ 1273 /* TBD: Port TPID acceptance register (PTAR) - low priority for basic driver */ 1274 /* TBD: Port QoS mode register (PQOSMR) - low priority for basic driver */ 1275 /* TBD: Port parser configuration register (PPCR) - low priority for basic driver */ 1276 /* TBD: Port ingress port filter configuration register (PIPFCR) - low priority for basic driver */ 1277 /* TBD: Port stream gate configuration register (PSGCR) - low priority for basic driver */ 1278 /* TBD: A lot of other stream gate and frame preemption settings - low priority for basic driver */ 1279 Netc_Eth_Ip_CreditBasedShaperConfigType (*cbsConfig)[NETC_ETH_IP_NUMBER_OF_PRIORITIES]; /*!< Configuration of each CBS used. */ 1280 #if (NETC_ETH_IP_NUMBER_OF_VLAN_FILTER_ENTRIES > 0) 1281 uint8 NumberOfVLANFilterEntries; /*!< NUmber of VLAN Filter Table entries. */ 1282 const Netc_Eth_Ip_VLANFilterTableEntryDataType (*VLANTableEntries)[NETC_ETH_IP_NUMBER_OF_VLAN_FILTER_ENTRIES]; /*!< Pointer to an array containing the configured VLAN Filter table entries. */ 1283 #endif 1284 uint16 maskMACPromiscuousMulticastEnable; /*!< Enable/Disable promiscuous multicast for all controllers. */ 1285 uint16 maskMACPromiscuousUnicastEnable; /*!< Enable/Disable promiscuous unicast for all controllers. */ 1286 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1287 uint32 CustomVlanEthertype1; /*!< Configure for custom VLAN Ethertype 1 register (CVLANR1). */ 1288 uint32 CustomVlanEthertype2; /*!< Configure for custom VLAN Ethertype 1 register (CVLANR2). */ 1289 #endif 1290 uint8 rxCheckSumOffloadingTCPUDP; /*!< Enable/Disable Rx Checksum offload for TCP/UDP. */ 1291 uint8 rxCheckSumOffloadingIPV4; /*!< Enable/Disable Rx Checksum offload for IPV4. */ 1292 /** TODO: other fields from Port station interface 0 configuration register 0 (PSI0CFGR0) */ 1293 1294 boolean enableUncorrectableErrors; /* Enable or disable the Uncorrectable Errors a PCIE level for all functions (SWITCH, ENETC, EMDIO, TIMER, PSI0, VSIx) */ 1295 boolean enableCorrectableErrors; /* Enable or disable the Correctable Errors a PCIE level for all functions (SWITCH, ENETC, EMDIO, TIMER, PSI0, VSIx) */ 1296 uint8 errorReportigSingleECCErrorsThreshold; /* The number of Single bit EC Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1297 uint8 errorReportingMultiBitECCErrorsThreshold; /* The number of Multi bit ECC errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1298 uint8 errorReportigIntegrityErrorsThreshold; /* The number of Integrity Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1299 uint8 errorReportingSystemBusErrorsThreshold; /* The number of System Bus Errors which will trigger the Error Reporting error. This threshold is set for all the functions */ 1300 Netc_Eth_Ip_PcieAerErrorReportingCallbackType errorReportingCallback; 1301 } Netc_Eth_Ip_EnetcGeneralConfigType; 1302 1303 /** @brief The station interface configuration. This applies to all SIs either PSI or VSI. */ 1304 typedef struct 1305 { 1306 boolean enableVlanToIpvMapping; /*!< V2IPVE - enables the mapping of PCP+DEI to IPV. */ 1307 boolean discardBroadcastFrames; /*!< RNBM - enables or disables discarding all broadcast frames */ 1308 boolean discardMulticastFrames; /*!< RNMM - enables or disables discarding all multicast frames */ 1309 boolean discardUnicastFrames; /*!< RNUM - enables or disables discarding all unicast frames */ 1310 uint8 vlanToIpv[16U]; /*!< Station interface VLAN to IPV mapping register 0 (SIVLANIPVMR0). PCP+DEI mapping to IPV */ 1311 uint8 ipvToBDR[8U]; /*!< Station interface IPV to ring mapping register (SIIPVBDRMR0). Mapping of IPV to BDR */ 1312 uint8 NumberOfRxBDR; /*!< The number of configured RX BDR */ 1313 uint8 NumberOfTxBDR; /*!< The number of configured TX BDR */ 1314 Netc_Eth_Ip_CommandBDType commandBDConfig; /*!< This will store the configuration of the command BDR. */ 1315 Netc_Eth_Ip_VsiToPsiMsgType *VSItoPSIMsgCommand; /*!< Address of the command message sent from VSI to PSI. */ 1316 uint8 CtrlLogicalIndex; /*!< This member keep the value of controller index for the callback function. */ 1317 1318 /* TODO: This information will be added temporary until MRU driver will be created. */ 1319 uint32 *txMruMailboxAddr; /*!< Mailbox address for TX. */ 1320 uint32 *rxMruMailboxAddr; /*!< Mailbox address for RX. */ 1321 uint32 *siMsgMruMailboxAddr; /*!< Mailbox address for VSI to PSI messenging. */ 1322 1323 uint8 MACFilterTableMaxNumOfEntries; /*!< Maximum number of entries in the MAC filter table. */ 1324 uint32 RxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1325 uint32 TxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1326 } Netc_Eth_Ip_StationInterfaceConfigType; 1327 1328 /** @brief Specialization of ring configuration for Tx Rings. */ 1329 typedef struct 1330 { 1331 Netc_Eth_Ip_TxBDRType *RingDesc; /*!< Buffer descriptor ring start address. */ 1332 Netc_Eth_Ip_ChCallbackType Callback; /*!< Callback function for current channel. */ 1333 uint8 *Buffer; /*!< Buffer data pool start address */ 1334 uint16 ringSize; /*!< Number of buffers descriptors for the current ring. */ 1335 uint16 maxRingSize; /*!< The maximum number of descriptors for the current ring between all variants. 1336 It is used for AUTOSAR specification. */ 1337 uint16 bufferLen; /*!< Length of each individual buffer in a pool. */ 1338 uint16 maxBuffLen; /*!< Maximum buffer size length supported by a transmit buffer for curent ring. 1339 This member is variant aware, it is used for AUTOSAR specification. */ 1340 uint8 Weight; /*!< Weight value. (0 to 7) */ 1341 uint8 Priority; /*!< Priority. 0 is lowest, 7 is highest */ 1342 uint32 TimerThreshold; /*!< Timer threshold, specified in units of NETC clock cycles. 1343 This value determines the maximum amount of 1344 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1345 (no. of packets) threshold is reached. */ 1346 uint8 PacketsThreshold; /*!< This value determines the minimum number of packets transmitted before 1347 raising an interrupt. 2^(PacketsThreshold-1) packets*/ 1348 } Netc_Eth_Ip_TxRingConfigType; 1349 1350 /** @brief RX ring configuration */ 1351 typedef struct 1352 { 1353 Netc_Eth_Ip_RxBDRType *RingDesc; /*!< Buffer descriptor ring start address. */ 1354 Netc_Eth_Ip_ChCallbackType Callback; /*!< Callback function for current channel. */ 1355 uint8 *Buffer; /*!< Buffer data pool start address */ 1356 uint16 ringSize; /*!< Number of buffers descriptors for the current ring. */ 1357 uint16 maxRingSize; /*!< The maximum number of descriptors for the current ring between all variants. 1358 It is used for AUTOSAR specification. */ 1359 uint16 bufferLen; /*!< Length of each individual buffer in a pool */ 1360 uint16 maxBuffLen; /*!< Maximum buffer size length supported by a receive buffer for curent ring. 1361 This member is variant aware, it is used for AUTOSAR specification. */ 1362 uint32 TimerThreshold; /*!< Timer threshold, specified in units of NETC clock cycles. 1363 This value determines the maximum amount of 1364 time allowed between a first received packet until RBaICR0[ICPT] (no. of packets) 1365 threshold is reached. */ 1366 uint16 PacketsThreshold; /*!< This value determines the minimum number of packets received before 1367 raising an interrupt. 1 -> 16384*/ 1368 } Netc_Eth_Ip_RxRingConfigType; 1369 1370 /** 1371 * @cond DRIVER_INTERNAL_USE_ONLY 1372 * @brief Internal driver state structure 1373 */ 1374 typedef struct 1375 { 1376 const Netc_Eth_Ip_EnetcGeneralConfigType *generalConfig; /*!< ENETC Base Register configuration. Only used for PSI, NULL_PTR for VSI. */ 1377 uint8 CtrlLogicalIndex; /*!< This member keep the value of controller index for the callback function. */ 1378 Netc_Eth_Ip_CallbackType Callback; /*!< Callback function for general interrupts. */ 1379 /* --------------------- RX ------------------- */ 1380 Netc_Eth_Ip_ChCallbackType RxCallback[FEATURE_NETC_RX_BDR_COUNT]; /*!< Callback function for current Rx channel. */ 1381 /** TODO: Make the value store in this pointer array a const, if there is any possibility. */ 1382 Netc_Eth_Ip_RxBDRType *FirstRxRingDescAddr[FEATURE_NETC_RX_BDR_COUNT]; /*!< Array with starting address of each ring of descriptors for a SI. */ 1383 Netc_Eth_Ip_RxBDRType *RxCurrentDesc[FEATURE_NETC_RX_BDR_COUNT]; /*!< The current available receive buffer descriptor pointer array. */ 1384 uint8 *FirstRxDataBufferAddr[FEATURE_NETC_RX_BDR_COUNT]; /*!< Array with starting address of each data buffer used to store RX data by ring. */ 1385 uint16 RxRingSize[FEATURE_NETC_RX_BDR_COUNT]; 1386 uint16 rxCurrentIndex[FEATURE_NETC_RX_BDR_COUNT]; /*!< Index of the current decriptor in ring. */ 1387 uint16 RxDataBuffMaxLenAddr[FEATURE_NETC_RX_BDR_COUNT]; 1388 uint16 LogicRxConsumerIndex[FEATURE_NETC_RX_BDR_COUNT]; /*!< Store reception consumer index for each ring. */ 1389 1390 /* --------------------- TX ------------------- */ 1391 Netc_Eth_Ip_ChCallbackType TxCallback[FEATURE_NETC_TX_BDR_COUNT]; /*!< Callback function for current Tx channel. */ 1392 uint16 LogicTxProducerIndex[FEATURE_NETC_TX_BDR_COUNT]; /*!< Store transmission producer index for each ring. */ 1393 boolean LockTxBuffDescr[FEATURE_NETC_TX_BDR_COUNT][NETC_ETH_MAX_NUMBER_OF_TXBD]; /*!< This flag will show the state of the data buffer ready(= FALSE)/busy(= TRUE). */ 1394 uint32 lastTxDataBuffAddrIdx[FEATURE_NETC_TX_BDR_COUNT]; /*!< Last buffer address status checked. */ 1395 uint8 *TxDataBuffAddr[FEATURE_NETC_TX_BDR_COUNT][NETC_ETH_MAX_NUMBER_OF_TXBD]; /*!< Store address of the transmitted buffer for each descriptor. */ 1396 uint16 TxRingSize[FEATURE_NETC_TX_BDR_COUNT]; /*!< Number of buffers descriptors for the current ring. */ 1397 uint16 TxBufferLength[FEATURE_NETC_TX_BDR_COUNT]; /*!< Length of each individual buffer in a pool. */ 1398 Netc_Eth_Ip_TxBDRType *FirstTxRingDescAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< Buffer descriptor ring start address. */ 1399 uint8 *FirstTxDataBufferAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< Array with starting address of each data buffer used to store TX data by ring. */ 1400 uint16 TxDataBuffMaxLenAddr[FEATURE_NETC_TX_BDR_COUNT]; /*!< */ 1401 1402 Netc_Eth_Ip_VsiToPsiMsgType *VSItoPSIMsgCommand; /*!< The VSI command sends to PSI. */ 1403 uint8 NumberOfRxBDR; /*!< The number of configured RX BDR */ 1404 uint8 NumberOfTxBDR; /*!< The number of configured TX BDR */ 1405 Netc_Eth_Ip_StationInterfaceType SiType; /*!< The type of the SI (PSI or VSI). */ 1406 uint8 MACFilterTableMaxNumOfEntries; /*!< Maximum number of entries in the MAC filter table. */ 1407 1408 const Netc_Eth_Ip_GeneralSIConfigType (*SIGeneralConfig)[FEATURE_NETC_ETH_NUMBER_OF_CTRLS]; /*!< SI Runtime permissions. Valid only for PSI, NULL_PTR for VSI */ 1409 1410 #if (STD_ON == NETC_ETH_IP_HAS_EXTERNAL_RX_BUFFERS) 1411 uint32 *RxDataBuffAddr; /*!< Store address of the received external buffer for each descriptor. */ 1412 #endif 1413 uint32 TxTimerThreshold[FEATURE_NETC_TX_BDR_COUNT]; /*!< Timer threshold, specified in units of NETC clock cycles. 1414 This value determines the maximum amount of 1415 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1416 (no. of packets) threshold is reached. */ 1417 uint8 TxPacketsThreshold[FEATURE_NETC_TX_BDR_COUNT]; /*!< This value determines the minimum number of packets transmitted before 1418 raising an interrupt. 2^(PacketsThreshold-1) packets*/ 1419 uint32 RxTimerThreshold[FEATURE_NETC_RX_BDR_COUNT]; /*!< Timer threshold, specified in units of NETC clock cycles. 1420 This value determines the maximum amount of 1421 time allowed between a first transmitted packet until the TBaICR0[ICPT] 1422 (no. of packets) threshold is reached. */ 1423 uint16 RxPacketsThreshold[FEATURE_NETC_RX_BDR_COUNT]; /*!< This value determines the minimum number of packets received before raising an interrupt. */ 1424 uint32 RxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1425 uint32 TxInterrupts; /*!< Channel interrupt sources. A logical OR of "Netc_Eth_Ip_ChInterruptType". */ 1426 Netc_Eth_Ip_CommandBDType EnetcCommandBDConfig; /*!< This will store the configuration of the command BDR. */ 1427 boolean PcieAerUncorrectableErrEnabled; /*!< Uncorrectable error reporting enabled/disabled. */ 1428 boolean PcieAerCorrectableErrEnabled; /*!< Correctable error reporting enabled/disabled. */ 1429 Netc_Eth_Ip_PcieAerErrorReportingCallbackType PcieAerErrorReportingCallback; 1430 } Netc_Eth_Ip_StateType; 1431 /** @endcond DRIVER_INTERNAL_USE_ONLY */ 1432 1433 /** 1434 * @brief Controller configuration for a SI from ENETC. 1435 * @details This will be used for Netc_Eth_Init. The SI type will generate the specific configuration. 1436 */ 1437 typedef struct 1438 { 1439 Netc_Eth_Ip_StationInterfaceType SiType; /*!< The type of the SI (PSI or VSI). */ 1440 const Netc_Eth_Ip_EnetcGeneralConfigType *generalConfig; /*!< ENETC Base Register configuration. Only used for PSI, NULL_PTR for VSI. */ 1441 const Netc_Eth_Ip_StationInterfaceConfigType *siConfig; /*!< ENETC Station Interface Register configuration. */ 1442 Netc_Eth_Ip_StateType *stateStructure; /*!< State structure for current controller. */ 1443 const Netc_Eth_Ip_RxRingConfigType (*paCtrlRxRingConfig)[]; /*!< Address of the array where RX rings are configured. */ 1444 const Netc_Eth_Ip_TxRingConfigType (*paCtrlTxRingConfig)[]; /*!< Address of the array where TX rings are configured. */ 1445 uint32 netcClockFrequency; /*!< Netc system clock */ 1446 #if (STD_ON == NETC_ETH_IP_HAS_EXTERNAL_RX_BUFFERS) 1447 uint32 *rxExternalBuffersAddr; /*!< Array that will keep the addresses of the external rx buffers. */ 1448 #endif 1449 uint32 RfsEntriesNb; /*!< Number of Receive Flow Steering Table entries */ 1450 const Netc_Eth_Ip_RfsEntryType (*RfsConfigTable)[]; /*!< Receive Flow Steering configuration table pointer. */ 1451 } Netc_Eth_Ip_ConfigType; 1452 1453 /*! 1454 * @brief User buffer type. 1455 * @implements Netc_Eth_Ip_BufferType_structure 1456 */ 1457 typedef struct 1458 { 1459 uint8 *data; /*!< Pointer to data buffer */ 1460 uint16 length; /*!< Length of the data buffer */ 1461 } Netc_Eth_Ip_BufferType; 1462 1463 /*! 1464 * @brief Defines the timestamp. 1465 * @implements Netc_Eth_Ip_TimestampType_structure 1466 */ 1467 typedef struct 1468 { 1469 uint32 nanoseconds; /*!< Nanoseconds part of the time. */ 1470 uint32 seconds; /*!< The 32 least significant bits of the 48 bits seconds part of the time. */ 1471 uint16 secondsHi; /*!< The 16 most significant bits of the 48 bit seconds part of the time. */ 1472 } Netc_Eth_Ip_TimestampType; 1473 1474 /** @brief Transmit options for a particular frame. */ 1475 typedef struct 1476 { 1477 Netc_Eth_Ip_TxOptionsFlagType Flag; /*!< This option will set the usage of the additional fields. */ 1478 uint8 SwtMgSendingOpt; /*!< Select between: 0 - Switch Port Masquerading 1479 1 - Direct Switch Enqueue */ 1480 uint8 TimestampRefReq; /*!< Valid when SwtMgSendingOpt = 1. Request to capture the timestamp 1481 when the frame's SFD is transmitted by the switch's Ethernet MAC. */ 1482 uint8 IngrOrEgrPortNumber; /*!< Ingress or Egress switch port number this frame is to be injected towards. 1483 Ingress - SwtMgSendingOpt = 0; Egress - SwtMgSendingOpt = 1 */ 1484 uint8 InternalPriority; /*!< Used to determine switch egress queue and buffer pool. SwtMgSendingOpt = 1 */ 1485 uint8 DiscardResilience; /*!< This field is used for congestion management handling within the switch. */ 1486 uint8 TxStartEnable; /*!< Transmit start enable */ 1487 uint32 TxStartTime; /*!< Transmit start time */ 1488 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1489 uint8 PriorityCodePoint; /*!< Contains the PCP value of the VLAN tag to be inserted in the packet during transmission. */ 1490 uint8 DropEligible; /*!< Contains the DEI value of the VLAN tag to be inserted in the packet during transmission. */ 1491 uint8 ExtensionFlags; /*!< Indicates what offloads are enabled for this frame. */ 1492 uint8 TagProtocolID; /*!< Contains the TPID of the VLAN tag to be inserted in the packet during transmission. */ 1493 uint16 VlanID; /*!< Identifier of the VLAN tag to be inserted in the packet during transmission. */ 1494 uint32 Timestamp; /*!< Timestamp value used to update packet header field on transmission. */ 1495 #endif 1496 } Netc_Eth_Ip_TxOptionsType; 1497 1498 /*! 1499 * @brief Detailed status of a transmit buffer descriptor. 1500 * TODO: Update when VLAN info will be added. 1501 * @implements Netc_Eth_Ip_TxInfoType_structure 1502 */ 1503 typedef struct 1504 { 1505 Netc_Eth_Ip_TimestampType timestamp; /*!< The timestamp of the transmitted packet. */ 1506 Netc_Eth_Ip_TxStatusType txStatus; /*!< Error status in the descriptor to be transmitted. */ 1507 } Netc_Eth_Ip_TxInfoType; 1508 1509 /*! 1510 * @brief Structure to store detailed status of a receive buffer descriptor. 1511 * TODO: Update when VLAN info will be added. 1512 * @implements Netc_Eth_Ip_RxInfoType_structure 1513 */ 1514 typedef struct 1515 { 1516 Netc_Eth_Ip_RxStatusType rxStatus; /*!< The error code in case of frame not received correct.*/ 1517 boolean L4cksum; /*!< L4 (TCP or UDP) Checksum was validated and found to be correct. */ 1518 boolean L3cksum; /*!< L3 (IPv4) Header Checksum was validated and found to be correct. */ 1519 boolean timestampReceived; /*!< Timestamp received */ 1520 boolean vlanHeaderAvl; /*!< VLAN header extracted */ 1521 uint16 pktLen; /*!< Length of the received packet. */ 1522 Netc_Eth_Ip_HostReasonType hostReason; /*!< Host Reason.*/ 1523 boolean finalDes; /*!< Determines the last buffer descriptor in a chain.*/ 1524 #if (STD_ON == NETC_ETH_IP_VLAN_SUPPORT) 1525 Netc_Eth_Ip_VlanType VlanInfo; /*!< Informations of VLAN frames.*/ 1526 #endif 1527 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1528 uint64 PacketTimestamp; /*!< The timestamp of the received packet. */ 1529 #endif 1530 } Netc_Eth_Ip_RxInfoType; 1531 1532 /** @brief MSI(message interrupt) table type. */ 1533 typedef struct 1534 { 1535 /* this type of structure is saved in NETC device memory which not supports burst writes and it will rise a bus hardfault in that case 1536 * volatile was added because otherwise compiler optimize writes on memory */ 1537 volatile uint32 *msgAddr; /*!< Address of the mailbox. */ 1538 volatile uint32 RESERVED_0; /*!< NOT USED. */ 1539 volatile uint32 msgData; /*!< Data transmitted by the interrupt event. */ 1540 volatile uint32 controlVector; /*!< */ 1541 } Netc_Eth_Ip_MSITableEntry; 1542 1543 /** @brief MSI table for each SI. */ 1544 typedef struct 1545 { 1546 Netc_Eth_Ip_MSITableEntry msiTable[3U]; /*!< Array with all entries in table. */ 1547 } Netc_Eth_Ip_MSITable; 1548 1549 /** @brief Entry type for MAC filter hash table. */ 1550 typedef struct 1551 { 1552 boolean EntryStatus; /*!< Status of the entry. TRUE - entry in use; FALSE - entry not used yet or deleted. */ 1553 uint8 HashValue; /*!< Hash value for the MAC address. */ 1554 uint8 MACAddr[6U]; /*!< MAC address. */ 1555 } Netc_Eth_Ip_MACFilterHashTableEntryType; 1556 1557 /** @brief Store the counter values for time. */ 1558 typedef struct 1559 { 1560 uint32 nanosecondsL; /*!< Nanoseconds low part of the time. */ 1561 uint32 nanosecondsH; /*!< Nanoseconds high part of the time. */ 1562 } Netc_Eth_Ip_TimeType; 1563 1564 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 1565 #ifdef NETC_ETH_0_USED 1566 /** @brief Management information. 1567 * implements Netc_Eth_Ip_TxManagementInfoType_structure */ 1568 typedef struct 1569 { 1570 boolean TxTimestampFlag; 1571 boolean ManagementFrameFlag; 1572 boolean TxTimestampRcvFlag; 1573 uint8 CtrlIdx; 1574 uint8 SwitchIndex; 1575 uint8 PortIndex; 1576 uint16 TxTimeStampID; 1577 uint16 TxBuffId; 1578 Netc_Eth_Ip_TxBDRType *TxBuffAddr; 1579 } Netc_Eth_Ip_TxManagementInfoType; 1580 1581 /** @brief Timestamp information. 1582 * implements Netc_Eth_Ip_TxTimestampInfoType_structure */ 1583 typedef struct 1584 { 1585 uint8 CtrlIdx; 1586 uint8 SwitchIndex; 1587 uint8 PortIndex; 1588 uint16 TxTimeStampID; 1589 Netc_Eth_Ip_TimeType TimestampValue; 1590 } Netc_Eth_Ip_TxTimestampInfoType; 1591 #endif /* NETC_ETH_0_USED */ 1592 1593 /** @brief Timestamp received frame information. 1594 * implements Netc_Eth_Ip_RxTimestampInfoType_structure */ 1595 typedef struct 1596 { 1597 uint8 RingIdx; 1598 uint8 *ReceivedDataPtr; 1599 uint8 SourcePort; 1600 boolean TimestampValueInvalidForSwt; /*!< Mark if the current timestamp is invalid. */ 1601 uint32 TimestampID; /*!< This represents a uniq ID inside a Netc_Eth_Ip_RxTimestampInfo buffer. */ 1602 Netc_Eth_Ip_TimeType TimestampValue; 1603 } Netc_Eth_Ip_RxTimestampInfoType; 1604 1605 #endif /* STD_ON == NETC_ETH_IP_EXTENDED_BUFF */ 1606 1607 /** 1608 * @brief Structure that maps exactly on the upper layer structure Eth_43_NETC_axTxBufferIdxMapType. 1609 * It is used as in/out parameter for the Netc_Eth_Ip_GetMultipleTxFramesStatus in the HLD driver flow 1610 * to retrieve the transmission status for multiple frames. 1611 * Find a solution to use this API on IP driver as well. Right now for IP driver this structure is not useful. 1612 */ 1613 typedef struct Netc_Eth_Ip_axTxBufferIdxMapType 1614 { 1615 uint8 FifoIdx; 1616 uint8* pu8BufferData; 1617 boolean bTxConfirmation; 1618 Netc_Eth_Ip_TxStatusType FrameHasError; 1619 struct Netc_Eth_Ip_axTxBufferIdxMapType *pNextBuffer; 1620 } Netc_Eth_Ip_axTxBufferIdxMapType; 1621 1622 /* implements Netc_Eth_Ip_ErrorCaptureRegLabel_enum */ 1623 typedef enum 1624 { 1625 NONE, /* Default unassigned value */ 1626 SIUPESR, /* This is the uncorrectable programming error status register.*/ 1627 SIUPECTR, /* This is the uncorrectable programming error count register which tracks how many received frames have been dropped by the station interface.*/ 1628 CMESR, /* This is the correctable memory error status register.*/ 1629 SICMESR, /* This is the correctable memory error status register.*/ 1630 UNSBESR, /* This is the uncorrectable non-fatal system bus error status register.*/ 1631 UNSBECTR, /* This is the uncorrectable non-fatal system bus error count register which tracks how many events have been detected.*/ 1632 SIUNSBESR, /* This is the uncorrectable non-fatal system bus error status register.*/ 1633 SIUNSBECTR, /* This is the uncorrectable non-fatal system bus error count register which tracks how many events have been detected.*/ 1634 TBCIR, /* Frame BD prefetching for the station interface ring is stalled. The frame BD consumer index will indicate the last successfully updated BD.*/ 1635 PM0_RERR, /* MAC Receive Frame Error Counter Register(ifInErrorsn)*/ 1636 PM1_RERR, /* MAC Receive Frame Error Counter Register(ifInErrorsn)*/ 1637 PM0_EVENT, 1638 PM1_EVENT, 1639 MAC_MERGE_MMFSECR0, /* A count of received MAC frames / MAC frame fragments rejected due to unknown SMD value or arriving with an SMD-C when no frame is in progress*/ 1640 MAC_MERGE_MMFSECR1, /* A count of received MAC frames / MAC frame fragments rejected due to unknown SMD value or arriving with an SMD-C when no frame is in progress*/ 1641 MAC_MERGE_MMFAECR0, /* A count of MAC frames with reassembly errors.*/ 1642 MAC_MERGE_MMFAECR1, /* A count of MAC frames with reassembly errors.*/ 1643 UNMESR0, /* This is the uncorrectable non-fatal memory error status register 0.*/ 1644 UNMESR1, /* This is the uncorrectable non-fatal memory error status register 1.*/ 1645 UNMECTR, /* This is the uncorrectable non-fatal memory error count register which tracks how many events have been detected.*/ 1646 SIUNMESR0, /* This is the uncorrectable non-fatal memory error status register 0.*/ 1647 SIUNMESR1, /* This is the uncorrectable memory error status register 1.*/ 1648 SIUNMECTR, /* This is the uncorrectable non-fatal memory error count register which tracks how many events have been detected. */ 1649 EMDIOUNIESR, /* This is the EMDIO uncorrectable non-fatal integrity error status register. */ 1650 UNIESR, /* This is the uncorrectable non-fatal integrity error status register. */ 1651 UNIECTR, /* This is the uncorrectable non-fatal integrity error count register which tracks how many events have been detected. */ 1652 TUFSBESR, /* This is the timer uncorrectable fatal system bus error status register. */ 1653 EMDIOUFSBESR, /*This is the EMDIO uncorrectable fatal system bus error status register.*/ 1654 UFSBESR, /* This is the uncorrectable fatal system bus error status register. */ 1655 SIUFSBESR, /* This is the uncorrectable fatal system bus error status register. */ 1656 RBPIR, /* Frame BD prefetching for the station interface ring is stalled. The frame BD producer index will indicate the last successfully updated BD.*/ 1657 UFMESR0, /* This is the uncorrectable fatal memory error status register 0. */ 1658 UFMESR1, /* This is the uncorrectable fatal memory error status register 1. */ 1659 SIUFMESR0, /* This is the uncorrectable fatal memory error status register 0. */ 1660 SIUFMESR1, /* This is the uncorrectable fatal memory error status register 1. */ 1661 UFIESR, /* This is the uncorrectable fatal integrity error status register. */ 1662 SIUFIESR, /* This is the uncorrectable fatal integrity error status register. */ 1663 UNMACESR /* This is the uncorrectable non-fatal MAC error status register.*/ 1664 } Netc_Eth_Ip_ErrorCaptureRegLabel; 1665 1666 /* implements Netc_Eth_Ip_ErrorCaptureRegisterInformation_structure */ 1667 typedef struct 1668 { 1669 uint32 RegRawValueLow; /* Error Capture Register Low part Raw value. The decoding must be done according to documentation 0-31 bits*/ 1670 uint32 RegRawValueHigh; /* Error Capture Register High Raw value. The decoding must be done according to documentation 32-63 bits. For 32bit registers it is set to 0. */ 1671 1672 Netc_Eth_Ip_ErrorCaptureRegLabel RegName; /* Error Capture Register name */ 1673 } Netc_Eth_Ip_ErrorCaptureRegisterInformation; 1674 1675 /*================================================================================================== 1676 * GLOBAL VARIABLE DECLARATIONS 1677 ==================================================================================================*/ 1678 1679 /*================================================================================================== 1680 * FUNCTION PROTOTYPES 1681 ==================================================================================================*/ 1682 1683 #ifdef __cplusplus 1684 } 1685 #endif 1686 1687 /** @} */ 1688 1689 #endif 1690