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Searched refs:Fin (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c170 static uint32 DFS_OUTPUT(const DFS_Type *Base, uint32 Channel, uint32 Fin);
3044 uint32 Fin; in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency() local
3062Fin = Clock_Ip_apfFreqTableClkSrc[((IP_MC_CGM_0->MUX_2_CSS & MC_CGM_MUX_2_CSS_SELSTAT_MASK) >> MC_… in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3063Fin &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_0->MUX_2_DC_2 & MC_CGM_MUX_2_DC_2_DE_MASK) >> MC_CGM… in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3066 if(0U == Fin) in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3072 if (Multi == ((uint32)(Multi * Fin) / Fin)) in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3074 …Frequency = ((Multi * Fin)/Div); /* calculate when Multi * … in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3076 else if (Div == ((uint32)(Fin/Div) * Fin)) in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3078 …Frequency = ((Fin/Div)*Multi); /* calculate when Fin % Di… in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
3082 Frequency = (Fin/Div)*Multi; /*calculate with even part*/ in Clock_Ip_Get_P0_PSI5_189K_CLK_Frequency()
[all …]
/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Frequency.c1618 uint32 Fin; in PLL_VCO() local
1629 Fin = get_SOSC_CLK_Frequency(); in PLL_VCO()
1633 Fin = get_FIRC_CLK_Frequency(); in PLL_VCO()
1636Fin = get_SOSC_CLK_Frequency(); … in PLL_VCO()
1644 if (0U != Fin) in PLL_VCO()
1646 if (Var1 == ((uint32)(Var1 * Fin) / Fin)) in PLL_VCO()
1648 Fout = Var1 * Fin; /* aux1 multiply by Fin */ in PLL_VCO()
1655 if ((Var2 == ((uint32)(Fin * Var2) / Fin)) && (CLOCK_IP_PLL_VCO_MAX_FREQ >= Fout)) in PLL_VCO()
1657 …Fout += (Fin * Var2) / Prediv ; /* Fin divide by (Prediv multiply by 2) multiply by Var2;… in PLL_VCO()
/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c3990 uint32 Fin; in Clock_Ip_PLL_VCO() local
4002 Fin = Clock_Ip_Get_FXOSC_CLK_Frequency(); /* input freq */ in Clock_Ip_PLL_VCO()
4021 …Var4 = Fin / Var3; /* Fin divide by (Rdiv multiplied by 18432… in Clock_Ip_PLL_VCO()
4022 …Var5 = Fin - (Var4 * Var3); /* Fin minus Var4 multiplied by (Rdiv mu… in Clock_Ip_PLL_VCO()
4024 if (0U != Fin) in Clock_Ip_PLL_VCO()
4026 if (Var1 == ((uint32)(Var1 * Fin) / Fin)) in Clock_Ip_PLL_VCO()
4028 Fout = Var1 * Fin; /* Var1 multipied by Fin */ in Clock_Ip_PLL_VCO()
4035 if ((Var2 == ((uint32)(Fin * Var2) / Fin)) && (CLOCK_IP_PLL_VCO_MAX_FREQ >= Fout)) in Clock_Ip_PLL_VCO()
4037 …Fout += Fin / Rdiv * Var2; /* Fin divided by Rdiv and multiplied by V… in Clock_Ip_PLL_VCO()