Searched refs:FIFOCTRL (Results 1 – 3 of 3) sorted by relevance
89 …base->FIFOCTRL[i] = CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1(pConfigs[j].mdQueueDepth) | CANXL_GRP_CONT… in CanXL_SetMDQueueConfigs()106 retValue = (uint8)(base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_MASK); in CanXL_GetMDQueueDepth()110 …retValue = (uint8)((base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_MASK)>>CANXL_G… in CanXL_GetMDQueueDepth()
83 …__IO uint32_t FIFOCTRL[CANXL_GRP_CONTROL_FIFOCTRLREQ_COUNT]; /**< Message FIFO Control 1..Message … member
14390 …__IO uint32_t FIFOCTRL; /**< EPDC FIFO control register, offset: 0x… member14694 #define EPDC_FIFOCTRL_REG(base) ((base)->FIFOCTRL)30273 …__IO uint32_t FIFOCTRL; /**< FIFO Status and Control Register, offs… member30321 #define MIPI_DSI_FIFOCTRL_REG(base) ((base)->FIFOCTRL)
