1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #if !defined(QSPI_IP_FEATURES_H)
8 #define QSPI_IP_FEATURES_H
9 
10 /**
11 *   @file Qspi_Ip_Features.h
12 *
13 *   @addtogroup FLS
14 *   @{
15 */
16 
17 /* implements Qspi_Ip_Features.h_Artifact */
18 
19 #ifdef __cplusplus
20 extern "C"{
21 #endif
22 
23 /*==================================================================================================
24 *                                        INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29 #include "S32K344_QUADSPI.h"
30 
31 /*==================================================================================================
32 *                              SOURCE FILE VERSION INFORMATION
33 ==================================================================================================*/
34 #define QSPI_IP_FEATURES_VENDOR_ID_CFG                      43
35 #define QSPI_IP_FEATURES_AR_RELEASE_MAJOR_VERSION_CFG       4
36 #define QSPI_IP_FEATURES_AR_RELEASE_MINOR_VERSION_CFG       7
37 #define QSPI_IP_FEATURES_AR_RELEASE_REVISION_VERSION_CFG    0
38 #define QSPI_IP_FEATURES_SW_MAJOR_VERSION_CFG               3
39 #define QSPI_IP_FEATURES_SW_MINOR_VERSION_CFG               0
40 #define QSPI_IP_FEATURES_SW_PATCH_VERSION_CFG               0
41 
42 
43 /*==================================================================================================
44 *                                      DEFINES AND MACROS
45 ==================================================================================================*/
46 
47 /* QuadSPI module features */
48 
49 /*! @brief First address of the serial flash device on the AHB bus for QuadSPI instances */
50 #define FEATURE_QSPI_AMBA_BASE                        {0x68000000UL}
51 /*! @brief Size of AHB buffer. */
52 #define FEATURE_QSPI_AHB_BUF_SIZE                     256U
53 /*! @brief Size of Tx FIFO. */
54 #define FEATURE_QSPI_TX_BUF_SIZE                      128U
55 /*! @brief Size of Rx FIFO. */
56 #define FEATURE_QSPI_RX_BUF_SIZE                      128U
57 /*! @brief Number of LUT registers that make up a LUT sequence */
58 #define FEATURE_QSPI_LUT_SEQUENCE_SIZE                5U
59 /* Minimum entries of 4 bytes fill needed to allow Tx operation to start */
60 #define FEATURE_QSPI_TX_MIN_BUF_FILL                  1U
61 
62 /*! @brief Supports Double Data Rate operation */
63 #define FEATURE_QSPI_DDR                              1
64 /*! @brief QSPI side B is available */
65 #define FEATURE_QSPI_HAS_SIDE_B                       0
66 /*! @brief Configurable Idle Signal Drive */
67 #define FEATURE_QSPI_CONFIGURABLE_ISD                 1
68 
69 /*! @brief Supports addr. config options (column address, word addressable) */
70 #define FEATURE_QSPI_ADDR_CFG                         1
71 /*! @brief Supports byte swap */
72 #define FEATURE_QSPI_BYTES_SWAP_ADDR                  1
73 
74 /*! @brief Supports center-aligned read strobe */
75 #define FEATURE_QSPI_CENTER_ALIGNED_READ_STROBE       0
76 /*! @brief Supports differential clock */
77 #define FEATURE_QSPI_DIFFERENTIAL_CLOCK               0
78 
79 /*! @brief Supports internal DQS sampling mode */
80 #define FEATURE_QSPI_INTERNAL_DQS                     0
81 /*! @brief Supports loopback sampling mode */
82 #define FEATURE_QSPI_LOOPBACK                         1
83 /*! @brief Supports DQS loopback sampling mode */
84 #define FEATURE_QSPI_LOOPBACK_DQS                     0
85 /*! @brief Supports external DQS sampling mode */
86 #define FEATURE_QSPI_EXTERNAL_DQS                     1
87 /*! @brief Supports DQS_FA_SEL/DQS_FB_SEL field in MCR register for DQS selection */
88 #define FEATURE_QSPI_SELECT_DQS                       1
89 
90 /*! @brief Supports Dll feature */
91 #define FEATURE_QSPI_HAS_DLL                          1
92 /*! @brief Supports full DLL features (as opposed to bypass mode only) */
93 #define FEATURE_QSPI_EXTERNAL_DLL_FULL                1
94 /*! @brief Supports DLL reference counter and DLL resolution */
95 #define FEATURE_QSPI_DLL_LOOPCONTROL                  1
96 
97 /*! @brief Supports secure flash protection feature */
98 #define FEATURE_QSPI_HAS_SFP                          0
99 
100 /*! @brief Needs S32K3 chip-specific initialization (SOCCR) */
101 #define FEATURE_QSPI_CHIP_OPTIONS_S32K3
102 
103 /*! @brief The maximum size of manufacturer & device ID that flash memories can have */
104 #define FEATURE_QSPI_FLASH_MDID_SIZE                  10U
105 
106 /*! @brief AHB base pointers initializer for all QSPI units */
107 #define QuadSPI_AHB_PTRS      FEATURE_QSPI_AMBA_BASE
108 
109 
110 #ifdef __cplusplus
111 }
112 #endif
113 
114 /** @} */
115 
116 #endif /* QSPI_IP_FEATURES_H */
117