Home
last modified time | relevance | path

Searched refs:ENDPTCTRL0 (Results 1 – 25 of 50) sorted by relevance

12

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h30433 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
31540 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h33481 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
34588 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h38960 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
40067 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h38977 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
40084 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h41026 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
42137 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h42306 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
43413 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h45716 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
46823 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h45292 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
46403 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h43691 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
44802 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h47885 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
48996 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h47742 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
48853 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/imx/devices/MCIMX7D/
DMCIMX7D_M4.h41913 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
41971 #define USB_ENDPTCTRL0_REG(base) ((base)->ENDPTCTRL0)
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h32340 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h32341 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h76429 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
77848 #define EPCR0 ENDPTCTRL0
DMIMXRT1165_cm4.h77362 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
78781 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h87613 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
89032 #define EPCR0 ENDPTCTRL0
DMIMXRT1175_cm4.h88546 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
89965 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h82827 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
84246 #define EPCR0 ENDPTCTRL0
DMIMXRT1166_cm7.h81894 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
83313 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h87613 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
89032 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h93075 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
94494 #define EPCR0 ENDPTCTRL0
DMIMXRT1173_cm4.h94008 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
95427 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h93078 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
94497 #define EPCR0 ENDPTCTRL0
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h93078 __IO uint32_t ENDPTCTRL0; /**< Endpoint Control0, offset: 0x1C0 */ member
94497 #define EPCR0 ENDPTCTRL0

12