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Searched refs:EDMA3PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR3_PCTL.h73 __IO uint32_t EDMA3PCTL; /**< eDMA_3 Clock Control Enable, offset: 0x0 */ member
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c2586 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR3_PCTL->EDMA3PCTL & GPR3_PCTL_EDMA3PCTL_PCTL_MASK) >> … in Clock_Ip_Get_EDMA3_CLK_Frequency()