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Searched refs:DSPI1PCTL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_GPR0_PCTL.h80 __IO uint32_t DSPI1PCTL; /**< SPI_1 Clock Control Enable, offset: 0x1C */ member
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c1862 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->DSPI1PCTL & GPR0_PCTL_DSPI1PCTL_PCTL_MASK) >> … in Clock_Ip_Get_SPI1_CLK_Frequency()