Searched refs:CurrentTxFifoSlot (Results 1 – 2 of 2) sorted by relevance
331 if (State->CurrentTxFifoSlot > (State->ExpectedFifoWrites - State->TxIndex)) in Spi_Ip_TransferProcess()333 State->CurrentTxFifoSlot = State->ExpectedFifoWrites - State->TxIndex; in Spi_Ip_TransferProcess()335 if(State->CurrentTxFifoSlot != 0u) in Spi_Ip_TransferProcess()337 Spi_Ip_WriteTxFifo(State->CurrentTxFifoSlot, Instance); in Spi_Ip_TransferProcess()339 State->CurrentTxFifoSlot = 0u; in Spi_Ip_TransferProcess()1087 State->CurrentTxFifoSlot += NumberOfReads*2u; in Spi_Ip_ReceiveData()1091 State->CurrentTxFifoSlot += NumberOfReads; in Spi_Ip_ReceiveData()1521 State->CurrentTxFifoSlot = SPI_IP_FIFO_SIZE_U16; in Spi_Ip_SyncTransmit()1549 if (State->CurrentTxFifoSlot > (State->ExpectedFifoWrites - State->TxIndex)) in Spi_Ip_SyncTransmit()1551 State->CurrentTxFifoSlot = State->ExpectedFifoWrites - State->TxIndex; in Spi_Ip_SyncTransmit()[all …]
236 uint16 CurrentTxFifoSlot; /**< Number of TX FIFO slots are current available. */ member
