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Searched refs:Clock_Ip_u32EnableGate (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c1645 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED}; variable
1757 …Frequency &= Clock_Ip_u32EnableGate[((IP_FIRC->STDBY_ENABLE & FIRC_STDBY_ENABLE_STDBY_EN_MASK) >> … in Clock_Ip_Get_FIRC_STANDBY_CLK_Frequency()
1767 …Frequency &= Clock_Ip_u32EnableGate[((IP_SIRC->MISCELLANEOUS_IN & SIRC_MISCELLANEOUS_IN_STANDBY_EN… in Clock_Ip_Get_SIRC_STANDBY_CLK_Frequency()
1778 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK53_M… in Clock_Ip_Get_FXOSC_CLK_Frequency()
1790 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK51_M… in Clock_Ip_Get_SXOSC_CLK_Frequency()
2015 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK40_M… in Clock_Ip_Get_ADC0_CLK_Frequency()
2025 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK41_M… in Clock_Ip_Get_ADC1_CLK_Frequency()
2036 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK42_M… in Clock_Ip_Get_ADC2_CLK_Frequency()
2048 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK43_M… in Clock_Ip_Get_ADC3_CLK_Frequency()
2060 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN3_COFB1_STAT & MC_ME_PRTN3_COFB1_STAT_BLOCK52_M… in Clock_Ip_Get_ADC4_CLK_Frequency()
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/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Frequency.c292 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED}; variable
800 …return (get_LPO_128K_CLK_Frequency() >> 2U) & Clock_Ip_u32EnableGate[((IP_SIM->LPOCLKS & SIM_LPOCL… in get_LPO_32K_CLK_Frequency()
806 …return (get_LPO_128K_CLK_Frequency() >> 7U) & Clock_Ip_u32EnableGate[((IP_SIM->LPOCLKS & SIM_LPOCL… in get_LPO_1K_CLK_Frequency()
940 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[59U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_ADC0_CLK_Frequency()
950 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[39U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_ADC1_CLK_Frequency()
970 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[115] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT… in get_CMP0_CLK_Frequency()
979 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[62] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CMU0_CLK_Frequency()
989 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[63] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CMU1_CLK_Frequency()
999 …Frequency &= Clock_Ip_u32EnableGate[((IP_PCC->PCCn[50] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)… in get_CRC0_CLK_Frequency()
1007 …Frequency &= Clock_Ip_u32EnableGate[((IP_SIM->PLATCGC & SIM_PLATCGC_CGCDMA_MASK) >> SIM_PLATCGC_CG… in get_DMA0_CLK_Frequency()
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/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c471 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED}; variable
1668 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->FR0PCTL & GPR0_PCTL_FR0PCTL_PCTL_MASK) >> GPR0… in Clock_Ip_Get_FRAY0_CLK_Frequency()
1678 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->FR1PCTL & GPR0_PCTL_FR1PCTL_PCTL_MASK) >> GPR0… in Clock_Ip_Get_FRAY1_CLK_Frequency()
1689 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->GTMNANOPCTL & GPR0_PCTL_GTMNANOPCTL_PCTL_GTM_M… in Clock_Ip_Get_GTM_CLK_Frequency()
1709 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->LIN0PCTL & GPR0_PCTL_LIN0PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN0_CLK_Frequency()
1719 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->LIN1PCTL & GPR0_PCTL_LIN1PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN1_CLK_Frequency()
1729 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR0_PCTL->LIN2PCTL & GPR0_PCTL_LIN2PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN2_CLK_Frequency()
1748 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR1_PCTL->LIN3PCTL & GPR1_PCTL_LIN3PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN3_CLK_Frequency()
1758 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR1_PCTL->LIN4PCTL & GPR1_PCTL_LIN4PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN4_CLK_Frequency()
1768 …Frequency &= Clock_Ip_u32EnableGate[((IP_GPR1_PCTL->LIN5PCTL & GPR1_PCTL_LIN5PCTL_PCTL_MASK) >> GP… in Clock_Ip_Get_LIN5_CLK_Frequency()
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