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Searched refs:Clock_Ip_apxLfastPll (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Pll.c462 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR |= LFAST_PLLCR_SWPOFF(1); in Clock_Ip_ResetLfastPLL()
464 Clock_Ip_apxLfastPll[Instance].PllInstance->MCR &= (~((uint32)LFAST_MCR_DRFEN_MASK)); in Clock_Ip_ResetLfastPLL()
466 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_FBDIV_MASK)); in Clock_Ip_ResetLfastPLL()
468 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_PREDIV_MASK)); in Clock_Ip_ResetLfastPLL()
470 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR &= (~((uint32)LFAST_PLLCR_FDIVEN_MASK)); in Clock_Ip_ResetLfastPLL()
472 RegValue = Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR; in Clock_Ip_ResetLfastPLL()
499 Clock_Ip_apxLfastPll[Instance].PllInstance->MCR &= (~((uint32)LFAST_MCR_DRFEN_MASK)); in Clock_Ip_ResetLfastPLL()
502 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR = RegValue; in Clock_Ip_ResetLfastPLL()
505 Clock_Ip_apxLfastPll[Instance].PllInstance->PLLCR |= LFAST_PLLCR_SWPOFF(1); in Clock_Ip_ResetLfastPLL()
533 Clock_Ip_apxLfastPll[Instance].PllInstance->MCR &= (~((uint32)LFAST_MCR_DRFEN_MASK)); in Clock_Ip_SetLfastPLL()
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DClock_Ip_Data.c2917 Clock_Ip_LfastPllType const Clock_Ip_apxLfastPll[CLOCK_IP_LFASTPLL_INSTANCES_ARRAY_SIZE] = variable
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h309 extern Clock_Ip_LfastPllType const Clock_Ip_apxLfastPll[CLOCK_IP_LFASTPLL_INSTANCES_ARRAY_SIZE];