1 /*
2  * Copyright 2020-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef POWER_IP_CORTEXM7_H
8 #define POWER_IP_CORTEXM7_H
9 
10 /**
11 *   @file       Power_Ip_CortexM7.h
12 *   @version    3.0.0
13 *
14 *   @brief   POWER IP driver header file.
15 *   @details POWER IP driver header file.
16 *
17 *   @addtogroup POWER_DRIVER Power Ip Driver
18 *   @{
19 */
20 
21 #ifdef __cplusplus
22 extern "C"{
23 #endif
24 
25 /*==================================================================================================
26 *                                         INCLUDE FILES
27 * 1) system and project includes
28 * 2) needed interfaces from external units
29 * 3) internal and external interfaces from this unit
30 ==================================================================================================*/
31 #include "Power_Ip_Types.h"
32 #include "Mcal.h"
33 
34 /*==================================================================================================
35                                SOURCE FILE VERSION INFORMATION
36 ==================================================================================================*/
37 #define POWER_IP_CORTEXM7_VENDOR_ID                    43
38 #define POWER_IP_CORTEXM7_AR_RELEASE_MAJOR_VERSION     4
39 #define POWER_IP_CORTEXM7_AR_RELEASE_MINOR_VERSION     7
40 #define POWER_IP_CORTEXM7_AR_RELEASE_REVISION_VERSION  0
41 #define POWER_IP_CORTEXM7_SW_MAJOR_VERSION             3
42 #define POWER_IP_CORTEXM7_SW_MINOR_VERSION             0
43 #define POWER_IP_CORTEXM7_SW_PATCH_VERSION             0
44 
45 
46 /*==================================================================================================
47                                       FILE VERSION CHECKS
48 ==================================================================================================*/
49 /* Check if Power_Ip_CortexM7.h file and Power_Ip_Types.h file have same versions */
50 #if (POWER_IP_CORTEXM7_VENDOR_ID  != POWER_IP_TYPES_VENDOR_ID)
51     #error "Power_Ip_CortexM7.h and Power_Ip_Types.h have different vendor IDs"
52 #endif
53 
54 /* Check if Power_Ip_CortexM7.h file and Power_Ip_Types.h file are of the same Autosar version */
55 #if ((POWER_IP_CORTEXM7_AR_RELEASE_MAJOR_VERSION    != POWER_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \
56      (POWER_IP_CORTEXM7_AR_RELEASE_MINOR_VERSION    != POWER_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \
57      (POWER_IP_CORTEXM7_AR_RELEASE_REVISION_VERSION != POWER_IP_TYPES_AR_RELEASE_REVISION_VERSION))
58     #error "AutoSar Version Numbers of Power_Ip_CortexM7.h and Power_Ip_Types.h are different"
59 #endif
60 
61 /* Check if Power_Ip_CortexM7.h file and Power_Ip_Types.h file are of the same Software version */
62 #if ((POWER_IP_CORTEXM7_SW_MAJOR_VERSION != POWER_IP_TYPES_SW_MAJOR_VERSION) || \
63      (POWER_IP_CORTEXM7_SW_MINOR_VERSION != POWER_IP_TYPES_SW_MINOR_VERSION) || \
64      (POWER_IP_CORTEXM7_SW_PATCH_VERSION != POWER_IP_TYPES_SW_PATCH_VERSION))
65     #error "Software Version Numbers of Power_Ip_CortexM7.h and Power_Ip_Types.h are different"
66 #endif
67 
68 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
69 /* Check if Power_Ip_CortexM7.h file and Mcal.h file are of the same Autosar version */
70 #if ((POWER_IP_CORTEXM7_AR_RELEASE_MAJOR_VERSION    != MCAL_AR_RELEASE_MAJOR_VERSION) || \
71      (POWER_IP_CORTEXM7_AR_RELEASE_MINOR_VERSION    != MCAL_AR_RELEASE_MINOR_VERSION))
72     #error "AutoSar Version Numbers of Power_Ip_CortexM7.h and Mcal.h are different"
73 #endif
74 #endif
75 /*==================================================================================================
76 *                                 GLOBAL VARIABLE DECLARATIONS
77 ==================================================================================================*/
78 
79 /*==================================================================================================
80 *                                             ENUMS
81 ==================================================================================================*/
82 
83 
84 /*==================================================================================================
85 *                                           CONSTANTS
86 ==================================================================================================*/
87 
88 /*==================================================================================================
89 *                                       DEFINES AND MACROS
90 ==================================================================================================*/
91 /***********************************************************/
92 /*          CortexM7 System Control Register               */
93 /***********************************************************/
94 #define CM7_SCR_BASEADDR    ((uint32)0xE000ED10U)
95 
96 #define CM7_SCR_SLEEPONEXIT_MASK32  ((uint32)0x00000002U)
97 #define CM7_SCR_SLEEPDEEP_MASK32    ((uint32)0x00000004U)
98 
99 
100 /* Memory mapping of Cortex-M Hardware */
101 /* Application Interrupt and Reset Control Register */
102 
103 #define CM_AIRCR_ADDR32                     ((uint32)0xE000ED0CU)               /* System Control Block Base Address  */
104 
105 /** CM7 AIRCR base pointer */
106 #define IP_CM_AIRCR                         (*(volatile uint32*)(CM_AIRCR_ADDR32))
107 
108 #define CM_AIRCR_SYSRESETREQ_MASK32         ((uint32)0x4U)
109 #define CM_AIRCR_VECTKEY_MASK32             ((uint32)0xFFFF0000U)
110 #define CM_AIRCR_VECTKEY_SHIFT32            ((uint32)16U)
111 
112 /**
113 * @violates @ref Reg_eSys_CortexM_H_REF_1 A function should be used in preference to a function-like macro
114 * where they are interchangeable.
115 */
116 #define CM_AIRCR_VECTKEY(x)                 ((uint32)( (uint32)( (x) << CM_AIRCR_VECTKEY_SHIFT32 ) & CM_AIRCR_VECTKEY_MASK32 ))
117 
118 #define CM_AIRCR_VECTKEY_KEY_U32            ((uint32)0x000005FAU)
119 /*==================================================================================================
120 *                                 STRUCTURES AND OTHER TYPEDEFS
121 ==================================================================================================*/
122 
123 
124 /*==================================================================================================
125 *                                      FUNCTION PROTOTYPES
126 ==================================================================================================*/
127 #define MCU_START_SEC_CODE
128 #include "Mcu_MemMap.h"
129 
130 #ifdef POWER_IP_SLEEPONEXIT_SUPPORT
131 #if (POWER_IP_SLEEPONEXIT_SUPPORT == STD_ON)
132 
133 #ifdef POWER_IP_ENABLE_USER_MODE_SUPPORT
134     #if (STD_ON == POWER_IP_ENABLE_USER_MODE_SUPPORT)
135         #define  Call_Power_Ip_CM7_EnableSleepOnExit()  OsIf_Trusted_Call(Power_Ip_CM7_EnableSleepOnExit)
136         #define  Call_Power_Ip_CM7_DisableSleepOnExit() OsIf_Trusted_Call(Power_Ip_CM7_DisableSleepOnExit)
137     #else
138         #define  Call_Power_Ip_CM7_EnableSleepOnExit()  Power_Ip_CM7_EnableSleepOnExit()
139         #define  Call_Power_Ip_CM7_DisableSleepOnExit() Power_Ip_CM7_DisableSleepOnExit()
140     #endif /* (STD_ON == POWER_IP_ENABLE_USER_MODE_SUPPORT) */
141 #else /* POWER_IP_ENABLE_USER_MODE_SUPPORT */
142     #define  Call_Power_Ip_CM7_EnableSleepOnExit()  Power_Ip_CM7_EnableSleepOnExit()
143     #define  Call_Power_Ip_CM7_DisableSleepOnExit() Power_Ip_CM7_DisableSleepOnExit()
144 #endif /* POWER_IP_ENABLE_USER_MODE_SUPPORT */
145 
146 #endif /* POWER_IP_SLEEPONEXIT_SUPPORT == STD_ON */
147 #endif /* POWER_IP_SLEEPONEXIT_SUPPORT */
148 
149 #ifdef POWER_IP_ENABLE_USER_MODE_SUPPORT
150     #if (STD_ON == POWER_IP_ENABLE_USER_MODE_SUPPORT)
151         #define  Call_Power_Ip_CM7_EnableDeepSleep()  OsIf_Trusted_Call(Power_Ip_CM7_EnableDeepSleep)
152         #define  Call_Power_Ip_CM7_DisableDeepSleep() OsIf_Trusted_Call(Power_Ip_CM7_DisableDeepSleep)
153     #else
154         #define  Call_Power_Ip_CM7_EnableDeepSleep()  Power_Ip_CM7_EnableDeepSleep()
155         #define  Call_Power_Ip_CM7_DisableDeepSleep() Power_Ip_CM7_DisableDeepSleep()
156     #endif /* (STD_ON == POWER_IP_ENABLE_USER_MODE_SUPPORT) */
157 #else /* POWER_IP_ENABLE_USER_MODE_SUPPORT */
158     #define  Call_Power_Ip_CM7_EnableDeepSleep()  Power_Ip_CM7_EnableDeepSleep()
159     #define  Call_Power_Ip_CM7_DisableDeepSleep() Power_Ip_CM7_DisableDeepSleep()
160 #endif /* POWER_IP_ENABLE_USER_MODE_SUPPORT */
161 
162 #ifdef POWER_IP_SLEEPONEXIT_SUPPORT
163   #if (POWER_IP_SLEEPONEXIT_SUPPORT == STD_ON)
164 
165 void Power_Ip_CM7_EnableSleepOnExit(void);
166 void Power_Ip_CM7_DisableSleepOnExit(void);
167   #endif
168 #endif
169 
170 void Power_Ip_CM7_DisableDeepSleep(void);
171 void Power_Ip_CM7_EnableDeepSleep(void);
172 #define MCU_STOP_SEC_CODE
173 #include "Mcu_MemMap.h"
174 
175 #ifdef __cplusplus
176 }
177 #endif
178 
179 /** @} */
180 #endif /* POWER_IP_CORTEXM7_H */
181 
182 
183