CMU_FC_GCR_FCE_MASK (reference) in projects: hal_nxp-3.6.0

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Searched refs:CMU_FC_GCR_FCE_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/src/
D	Clock_Ip_Monitor.c	`240 if (CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED == (CmuFc->GCR & CMU_FC_GCR_FCE_MASK)) in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 259 CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK; in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 393 CmuFc->GCR \|= CMU_FC_GCR_FCE_MASK; in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref() 397 CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK; in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref()`
D	Clock_Ip_Specific.c	`657 …CmuConfiguration.Enable = (Clock_Ip_apxCmu[0U]->GCR & CMU_FC_GCR_FCE_MASK) >> CMU_FC_GCR_FCE_SHIFT; in getCmuFircConfig() 664 …CmuConfiguration.Enable = (Clock_Ip_apxCmu[1U]->GCR & CMU_FC_GCR_FCE_MASK) >> CMU_FC_GCR_FCE_SHIFT; in getCmuFircConfig()`
/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/src/
D	Clock_Ip_Monitor.c	`272 if (CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED == (CmuFc->GCR & CMU_FC_GCR_FCE_MASK)) in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 291 CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK; in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 425 CmuFc->GCR \|= CMU_FC_GCR_FCE_MASK; in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref() 429 CmuFc->GCR &= ~CMU_FC_GCR_FCE_MASK; in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref()`
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
D	Clock_Ip_Monitor.c	`240 if (CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED == (CmuFc->GCR & CMU_FC_GCR_FCE_MASK)) in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 259 CmuFc->GCR &= ~(uint8)(CMU_FC_GCR_FCE_MASK); in Clock_Ip_DisableCmuFcFceRefCntLfrefHfref() 413 CmuFc->GCR \|= (uint8)(CMU_FC_GCR_FCE_MASK); in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref() 417 CmuFc->GCR &= ~(uint8)(CMU_FC_GCR_FCE_MASK); in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref()`
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
D	S32K344_CMU_FC.h	`118 #define CMU_FC_GCR_FCE_MASK (0x1U) macro 121 … (((uint32_t)(((uint32_t)(x)) << CMU_FC_GCR_FCE_SHIFT)) & CMU_FC_GCR_FCE_MASK)`
/hal_nxp-3.6.0/s32/drivers/s32k1/Mcu/include/
D	Clock_Ip_Specific.h	`338 #define CMU_FC_GCR_FCE_MASK CMU_GCR_FCE_MASK macro 366 #define CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED CMU_FC_GCR_FCE_MASK`
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_CMU_FC.h	`210 #define CMU_FC_GCR_FCE_MASK (0x1U) macro 213 … (((uint32_t)(((uint32_t)(x)) << CMU_FC_GCR_FCE_SHIFT)) & CMU_FC_GCR_FCE_MASK)`
/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/include/
D	Clock_Ip_Specific.h	`193 #define CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED CMU_FC_GCR_FCE_MASK`
/hal_nxp-3.6.0/s32/drivers/s32k3/Mcu/include/
D	Clock_Ip_Specific.h	`348 #define CLOCK_IP_CMU_FREQUENCY_CHECK_ENABLED CMU_FC_GCR_FCE_MASK`

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