Searched refs:CLOCK_IP_ENABLED (Results 1 – 3 of 3) sorted by relevance
88 #define CLOCK_IP_ENABLED 0xFFFFFFFFU macro291 static const uint32 Clock_Ip_u32EnableClock[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};292 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};958 const uint32 EnableDivider[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED}; in get_CLKOUT0_CLK_Frequency()1450 …32EnableGate[((IP_PCC->PCCn[118U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)] == CLOCK_IP_ENABLED) in get_QSPI_CLK_Frequency()1485 …32EnableGate[((IP_PCC->PCCn[118U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)] == CLOCK_IP_ENABLED) in get_QSPI_SFIF_CLK_HYP_PREMUX_CLK_Frequency()1521 …32EnableGate[((IP_PCC->PCCn[118U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)] == CLOCK_IP_ENABLED) in get_QSPI_SFIF_CLK_Frequency()1549 …32EnableGate[((IP_PCC->PCCn[118U] & PCC_PCCn_CGC_MASK) >> PCC_PCCn_CGC_SHIFT)] == CLOCK_IP_ENABLED) in get_QSPI_2xSFIF_CLK_Frequency()
91 #define CLOCK_IP_ENABLED 0xFFFFFFFFU macro1644 static const uint32 Clock_Ip_au32EnableDivider[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};1645 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};
101 #define CLOCK_IP_ENABLED 0xFFFFFFFFU macro470 static const uint32 Clock_Ip_au32EnableDivider[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};471 static const uint32 Clock_Ip_u32EnableGate[2U] = {CLOCK_IP_DISABLED,CLOCK_IP_ENABLED};
