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Searched refs:CLOCK_IP_DFS_MASK_5_CHANNEL (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c93 #define CLOCK_IP_DFS_MASK_5_CHANNEL 32U macro
1478 …SR >> DFS_PORTSR_PORTSTAT_SHIFT) & DFS_PORTSR_PORTSTAT_MASK) & CLOCK_IP_DFS_MASK_5_CHANNEL) != 0U)… in Clock_Ip_Get_COREPLL_DFS5_Frequency()
1596 …SR >> DFS_PORTSR_PORTSTAT_SHIFT) & DFS_PORTSR_PORTSTAT_MASK) & CLOCK_IP_DFS_MASK_5_CHANNEL) != 0U)… in Clock_Ip_Get_PERIPHPLL_DFS5_Frequency()