Searched refs:CIMR1 (Results 1 – 4 of 4) sorted by relevance
86 __IO uint32_t CIMR1; /**< Channel Interrupt Mask 1, offset: 0x28 */ member
91 …__IO uint32_t CIMR1; /**< EOC Interrupt Enable For Standard Inputs, of… member
88101 __IO uint32_t CIMR1; /**< Channel Interrupt Mask 1, offset: 0x28 */ member
76538 __IO uint32_t CIMR1; /**< Channel Interrupt Mask 1, offset: 0x28 */ member
