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Searched refs:CH2STAT (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/drivers/dcp/
Dfsl_dcp.c143 statReg = base->CH2STAT; in dcp_get_channel_status()
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h8317 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h9035 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10599 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10615 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11641 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12883 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12885 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12426 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h13252 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h14038 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h14112 …__IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0… member