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Searched refs:CACR (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SCB.h134 __IO uint32_t CACR; /**< L1 Cache Control Register, offset: 0xF9C */ member
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_SCB.h132 __IO uint32_t CACR; /**< L1 Cache Control Register, offset: 0xF9C */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm7.h509 __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Include/
Dcore_cm7.h503 __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ member
Dcore_armv81mml.h546 __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ member