1 /*
2  * Copyright 2020-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ADC_SAR_IP_TYPES_H
8 #define ADC_SAR_IP_TYPES_H
9 
10 /**
11 *   @file
12 *
13 *   @addtogroup adc_sar_ip Adc Sar IPL
14 *   @{
15 */
16 
17 #ifdef __cplusplus
18 extern "C"{
19 #endif
20 
21 /*==================================================================================================
22 *                                        INCLUDE FILES
23 * 1) system and project includes
24 * 2) needed interfaces from external units
25 * 3) internal and external interfaces from this unit
26 ==================================================================================================*/
27 #include "StandardTypes.h"
28 #include "Adc_Sar_Ip_CfgDefines.h"
29 
30 /*==================================================================================================
31 *                                SOURCE FILE VERSION INFORMATION
32 ==================================================================================================*/
33 #define ADC_SAR_IP_VENDOR_ID_TYPES                      43
34 #define ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_TYPES       4
35 #define ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_TYPES       7
36 #define ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_TYPES    0
37 #define ADC_SAR_IP_SW_MAJOR_VERSION_TYPES               3
38 #define ADC_SAR_IP_SW_MINOR_VERSION_TYPES               0
39 #define ADC_SAR_IP_SW_PATCH_VERSION_TYPES               0
40 
41 /*==================================================================================================
42 *                                      FILE VERSION CHECKS
43 ==================================================================================================*/
44 /* Check if Adc_Sar_Ip_Types.h file and Adc_Sar_Ip_CfgDefines.h file are of the same vendor */
45 #if (ADC_SAR_IP_VENDOR_ID_TYPES != ADC_SAR_IP_VENDOR_ID_CFGDEFINES)
46     #error "Adc_Sar_Ip_Types.h and Adc_Sar_Ip_CfgDefines.h have different vendor ids"
47 #endif
48 
49 /* Check if Adc_Sar_Ip_Types.h file and Adc_Sar_Ip_CfgDefines.h file are of the same Autosar version */
50 #if ((ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_TYPES != ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_CFGDEFINES) || \
51      (ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_TYPES != ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_CFGDEFINES) || \
52      (ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_TYPES != ADC_SAR_IP_AR_RELEASE_REVISION_VERSION_CFGDEFINES) \
53     )
54     #error "AutoSar Version Numbers of Adc_Sar_Ip_Types.h and Adc_Sar_Ip_CfgDefines.h are different"
55 #endif
56 
57 /* Check if Adc_Sar_Ip_Types.h file and Adc_Sar_Ip_CfgDefines.h file are of the same Software version */
58 #if ((ADC_SAR_IP_SW_MAJOR_VERSION_TYPES != ADC_SAR_IP_SW_MAJOR_VERSION_CFGDEFINES) || \
59      (ADC_SAR_IP_SW_MINOR_VERSION_TYPES != ADC_SAR_IP_SW_MINOR_VERSION_CFGDEFINES) || \
60      (ADC_SAR_IP_SW_PATCH_VERSION_TYPES != ADC_SAR_IP_SW_PATCH_VERSION_CFGDEFINES) \
61     )
62   #error "Software Version Numbers of Adc_Sar_Ip_Types.h and Adc_Sar_Ip_CfgDefines.h are different"
63 #endif
64 
65 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
66 /* Check if Adc_Sar_Ip_Types.h file and StandardTypes.h file are of the same Autosar version */
67 #if ((ADC_SAR_IP_AR_RELEASE_MAJOR_VERSION_TYPES != STD_AR_RELEASE_MAJOR_VERSION) || \
68      (ADC_SAR_IP_AR_RELEASE_MINOR_VERSION_TYPES != STD_AR_RELEASE_MINOR_VERSION)    \
69     )
70     #error "AutoSar Version Numbers of Adc_Sar_Ip_Types.h and StandardTypes.h are different"
71 #endif
72 #endif /* DISABLE_MCAL_INTERMODULE_ASR_CHECK */
73 /*==================================================================================================
74 *                              STRUCTURES AND OTHER TYPEDEFS
75 ==================================================================================================*/
76 
77 /*!
78  * @brief ADC_SAR status return type
79  *
80  * This enum is used as return type
81  *
82  * Implements : Adc_Sar_Ip_StatusType_Class
83  */
84 typedef enum
85 {
86     ADC_SAR_IP_STATUS_SUCCESS = 0x00U,  /*!< Function completed successfully */
87     ADC_SAR_IP_STATUS_ERROR = 0x01U,    /*!< Function didn't complete successfully */
88     ADC_SAR_IP_STATUS_TIMEOUT = 0x02U   /*!< Function timed out */
89 } Adc_Sar_Ip_StatusType;
90 
91 /*!
92  * @brief Conversion mode selection (One-shot or Scan)
93  *
94  * This enum is used to configure the conversion mode
95  *
96  * Implements : Adc_Sar_Ip_ConvModeType_Class
97  */
98 typedef enum
99 {
100     ADC_SAR_IP_CONV_MODE_ONESHOT = 0x00U,  /*!< One-shot conversion mode */
101     ADC_SAR_IP_CONV_MODE_SCAN = 0x01U      /*!< Scan conversion mode */
102 } Adc_Sar_Ip_ConvModeType;
103 
104 /*!
105  * @brief Converter input clock
106  *
107  * This enum is used to configure the converter input clock
108  *
109  * Implements : Adc_Sar_Ip_ClockSelType_Class
110  */
111 typedef enum
112 {
113     ADC_SAR_IP_CLK_FULL_BUS = 0x00U,       /*!< Adc module clock   */
114     ADC_SAR_IP_CLK_HALF_BUS = 0x01U,       /*!< Adc module clock/2 */
115 #if FEATURE_ADC_HAS_CLKSEL_EXTENDED
116     ADC_SAR_IP_CLK_QUARTER_BUS = 0x02U,    /*!< Adc module clock/4 */
117 #endif /* FEATURE_ADC_HAS_CLKSEL_EXTENDED */
118 } Adc_Sar_Ip_ClockSelType;
119 
120 #if FEATURE_ADC_HAS_CTU
121 /*!
122  * @brief CTU Mode selection
123  *
124  * This enum is used to configure the mode in which CTU is used
125  *
126  * Implements : Adc_Sar_Ip_CtuModeType_Class
127  */
128 typedef enum
129 {
130     ADC_SAR_IP_CTU_MODE_DISABLED = 0x00U,  /*!< CTU Mode disabled */
131     ADC_SAR_IP_CTU_MODE_CONTROL = 0x01U,    /*!< CTU is in Control Mode */
132     ADC_SAR_IP_CTU_MODE_TRIGGER = 0x02U    /*!< CTU is in Trigger Mode */
133 } Adc_Sar_Ip_CtuModeType;
134 #endif /* FEATURE_ADC_HAS_CTU */
135 
136 #if (ADC_SAR_IP_EXTERNAL_TRIGGER_ENABLE)
137 #if (FEATURE_ADC_HAS_INJ_EXT_TRIGGER || FEATURE_ADC_HAS_EXT_TRIGGER)
138 /*!
139  * @brief External Trigger selection
140  *
141  * This enum is used to configure the external trigger
142  *
143  * Implements : Adc_Sar_Ip_ExtTriggerEdgeType_Class
144  */
145 typedef enum
146 {
147     ADC_SAR_IP_EXT_TRIG_EDGE_DISABLED = 0x00U, /*!< Injected trigger disabled */
148     ADC_SAR_IP_EXT_TRIG_EDGE_FALLING = 0x01U,  /*!< Injected trigger on Falling Edge */
149     ADC_SAR_IP_EXT_TRIG_EDGE_RISING = 0x02U,   /*!< Injected trigger on Rising Edge */
150 } Adc_Sar_Ip_ExtTriggerEdgeType;
151 
152 /*!
153  * @brief External Trigger Source Enable
154  *
155  * This enum is used to enable the external trigger source to start the conversion.
156  *
157  * Implements : Adc_Sar_Ip_ExtTriggerSourceType_Class
158  */
159 typedef enum {
160 #if (FEATURE_ADC_HAS_EXT_TRIGGER)
161     ADC_SAR_IP_NORMAL_EXT_TRIG     = 0x00U,       /*!< Enables normal trigger input */
162 #if (FEATURE_ADC_HAS_AUX_EXT_TRIGGER)
163     ADC_SAR_IP_AUX_NORMAL_EXT_TRIG = 0x01U,       /*!< Enables auxiliary normal trigger input */
164     ADC_SAR_IP_ALL_NORMAL_EXT_TRIG = 0x02U,       /*!< Enables normal and auxiliary trigger inputs */
165 #endif /* (FEATURE_ADC_HAS_AUX_EXT_TRIGGER) */
166 #endif /* (FEATURE_ADC_HAS_EXT_TRIGGER) */
167 #if (FEATURE_ADC_HAS_INJ_EXT_TRIGGER)
168     ADC_SAR_IP_INJECTED_EXT_TRIG   = 0x03U,       /*!< Enables injection trigger input */
169 #endif /* (FEATURE_ADC_HAS_INJ_EXT_TRIGGER) */
170 } Adc_Sar_Ip_ExtTriggerSourceType;
171 #endif /* (FEATURE_ADC_HAS_INJ_EXT_TRIGGER || FEATURE_ADC_HAS_EXT_TRIGGER) */
172 #endif /* (ADC_SAR_IP_EXTERNAL_TRIGGER_ENABLE) */
173 
174 /*!
175  * @brief Conversion chain selection
176  *
177  * This enum is used to configure type of the conversion
178  *
179  * Implements : Adc_Sar_Ip_ConvChainType_Class
180  */
181 typedef enum
182 {
183     ADC_SAR_IP_CONV_CHAIN_NORMAL = 0x00U,      /*!< Selects the "Normal" Conversion Chain */
184     ADC_SAR_IP_CONV_CHAIN_INJECTED = 0x01U,    /*!< Selects the "Injected" Conversion Chain */
185     ADC_SAR_IP_CONV_CHAIN_CTU = 0x02U          /*!< Selects the "CTU" Conversion Chain */
186 } Adc_Sar_Ip_ConvChainType;
187 
188 /*!
189  * @brief Data alignment selection
190  *
191  * This enum is used to configure data alignment
192  *
193  * Implements : Adc_Sar_Ip_DataAlignedType_Class
194  */
195 typedef enum
196 {
197     ADC_SAR_IP_DATA_ALIGNED_RIGHT = 0x00U,     /*!< Measured data is right-aligned */
198     ADC_SAR_IP_DATA_ALIGNED_LEFT = 0x01U       /*!< Measured data is left-aligned */
199 } Adc_Sar_Ip_DataAlignedType;
200 
201 /*!
202  * @brief Clear DMA source
203  *
204  * This enum is used to configure source used to clear a DMA request
205  *
206  * Implements : Adc_Sar_Ip_ClearSourceType_Class
207  */
208 typedef enum {
209     ADC_SAR_IP_DMA_REQ_CLEAR_ON_ACK = 0x00U,    /*!< Clear DMA Request on Ack from DMA Controller */
210     ADC_SAR_IP_DMA_REQ_CLEAR_ON_READ = 0x01U,   /*!< Clear DMA Request on read of Data Registers */
211 } Adc_Sar_Ip_ClearSourceType;
212 
213 #if FEATURE_ADC_HAS_PRESAMPLING
214 /*!
215  * @brief Presampling Voltage selection
216  *
217  * This enum is used to configure the presampling voltage
218  *
219  * Implements : Adc_Sar_Ip_PresamplingSourceType_Class
220  */
221 typedef enum {
222 #if (ADC_PSCR_PREVAL0_WIDTH > 1u)
223     ADC_SAR_IP_PRESAMPLE_DVDD = ADC_SAR_IP_PRESAMPLE_DVDD_EVAL,   /*!< Presampling from DVDD */
224     ADC_SAR_IP_PRESAMPLE_AVDD = ADC_SAR_IP_PRESAMPLE_AVDD_EVAL,    /*!< Presampling from AVDD */
225 #endif /* (ADC_PSCR_PREVAL0_WIDTH > 1u) */
226     ADC_SAR_IP_PRESAMPLE_VREFL = ADC_SAR_IP_PRESAMPLE_VREFL_EVAL, /*!< Presampling from VREFL */
227     ADC_SAR_IP_PRESAMPLE_VREFH = ADC_SAR_IP_PRESAMPLE_VREFH_EVAL  /*!< Presampling from VREFH */
228 } Adc_Sar_Ip_PresamplingSourceType;
229 #endif /* FEATURE_ADC_HAS_PRESAMPLING */
230 
231 /*!
232  * @brief Channel group selection
233  *
234  * This enum is used to select the group of ADC channels
235  *
236  * Implements : Adc_Sar_Ip_ChanGroupType_Class
237  */
238 typedef enum {
239     ADC_SAR_IP_CHAN_GROUP_0 = 0x00U,           /*!< Channels Group (0-31) */
240     ADC_SAR_IP_CHAN_GROUP_1 = 0x01U,           /*!< Channels Group (32-63) */
241 #if (ADC_SAR_IP_NUM_GROUP_CHAN > 2u)
242     ADC_SAR_IP_CHAN_GROUP_2 = 0x02U,           /*!< Channels Group (64-95) */
243 #endif /* (ADC_SAR_IP_NUM_GROUP_CHAN > 2u) */
244 } Adc_Sar_Ip_ChanGroupType;
245 
246 #if FEATURE_ADC_HAS_AVERAGING
247 /*!
248  * @brief Averaging selection
249  *
250  * This enum is used to select the number of conversions to average
251  * in order to get the conversion data.
252  *
253  * Implements : Adc_Sar_Ip_AvgSelectType_Class
254  */
255 typedef enum {
256     ADC_SAR_IP_AVG_4_CONV = 0x00U,        /*!< 4 conversions per conversion data */
257     ADC_SAR_IP_AVG_8_CONV = 0x01U,        /*!< 8 conversions per conversion data */
258     ADC_SAR_IP_AVG_16_CONV = 0x02U,       /*!< 16 conversions per conversion data */
259     ADC_SAR_IP_AVG_32_CONV = 0x03U,       /*!< 32 conversions per conversion data */
260 } Adc_Sar_Ip_AvgSelectType;
261 #endif /* FEATURE_ADC_HAS_AVERAGING */
262 
263 #if (ADC_SAR_IP_SET_RESOLUTION == STD_ON)
264 /**
265 * @brief          Adc group conversion resolution.
266 * @details        Used for value received by Tressos interface configuration.
267 *
268 */
269 typedef enum
270 {
271     ADC_SAR_IP_RESOLUTION_14   = 0U, /**< @brief 14-bit per conversion data */
272     ADC_SAR_IP_RESOLUTION_12   = 1U, /**< @brief 12-bit per conversion data */
273     ADC_SAR_IP_RESOLUTION_10   = 2U, /**< @brief 10-bit per conversion data */
274     ADC_SAR_IP_RESOLUTION_8    = 3U, /**< @brief 8-bit per conversion data */
275 } Adc_Sar_Ip_Resolution;
276 #endif /* (ADC_SAR_IP_SET_RESOLUTION == STD_ON) */
277 
278 #if (STD_ON == ADC_SAR_IP_EOC_ENABLED)
279 /*!
280  * @brief Defines the channel notification header
281  *
282  * This header is used for individual channel notification callbacks
283  *
284  * Implements : Adc_Sar_Ip_ChanNotificationType_Class
285  */
286 typedef void Adc_Sar_Ip_ChanNotificationType(const uint16 PhysicalChanId);
287 #endif /* (STD_ON == ADC_SAR_IP_EOC_ENABLED) */
288 
289 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
290 /*!
291  * @brief Defines the watchdog notification header
292  *
293  * This header is used for out of range watchdog notification callbacks
294  * u8Flags will contain which WDG flag was triggered(low and/or high). These
295  * are defined by ADC_SAR_IP_WDG_LOW_FLAG and ADC_SAR_IP_WDG_HIGH_FLAG
296  *
297  * Implements : Adc_Sar_Ip_WdgChanNotificationType_Class
298  */
299 typedef void Adc_Sar_Ip_WdgNotificationType(const uint16 ChanIdx, const uint8 Flags);
300 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
301 
302 /*!
303  * @brief Defines the channel configuration
304  *
305  * This structure is used to configure channels
306  *
307  * Implements : Adc_Sar_Ip_ChanConfigType_Class
308  */
309 typedef struct
310 {
311     uint8 ChanIndex;
312     boolean PresamplingEnable;
313 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
314     uint8 WdgThreshRegIndex;
315     boolean WdgNotificationEn;
316 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
317 #if (STD_ON == ADC_SAR_IP_EOC_ENABLED)
318     boolean EndOfConvNotification;
319 #endif /* (STD_ON == ADC_SAR_IP_EOC_ENABLED) */
320     boolean EndOfConvDmaEnable;
321 } Adc_Sar_Ip_ChanConfigType;
322 
323 /*!
324  * @brief Defines the ADC clock configuration
325  *
326  * This structure is used to the ADC_SAR clock
327  *
328  * Implements : Adc_Sar_Ip_ClockConfigType_Class
329  */
330 typedef struct
331 {
332     Adc_Sar_Ip_ClockSelType ClkSelect;         /*!< Selected clock */
333 #if FEATURE_ADC_HAS_HIGH_SPEED_ENABLE
334     boolean HighSpeedConvEn; /* Enables high speed conversion or calibration */
335 #endif /* FEATURE_ADC_HAS_HIGH_SPEED_ENABLE */
336 #if FEATURE_ADC_HAS_CONVERSION_TIMING
337     uint8 SampleTimeArr[ADC_SAR_IP_NUM_GROUP_CHAN];  /*!< Sample time for each channel group */
338 #endif /* FEATURE_ADC_HAS_CONVERSION_TIMING */
339     uint8 PowerDownDelay;                     /*!< Delay before entering Power Down */
340 #if FEATURE_ADC_HAS_CLOCK_DIVIDER
341     boolean ClkDivEnable;               /*!< Clock divider enable */
342 #endif /* FEATURE_ADC_HAS_CLOCK_DIVIDER */
343 #if FEATURE_ADC_HAS_AVERAGING
344     boolean AvgEn;
345     Adc_Sar_Ip_AvgSelectType AvgSel;
346 #endif /* FEATURE_ADC_HAS_AVERAGING */
347 } Adc_Sar_Ip_ClockConfigType;
348 
349 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
350 /*!
351  * @brief Defines the upper and lower thresholds for analog watchdog.
352  *
353  * This structure is used to configure the analog watchdog threshold registers.
354  *
355  * Implements : Adc_Sar_Ip_WdgThresholdType_Class
356  */
357 typedef struct
358 {
359     uint8 WdgIndex;               /*!< Watchdog threshold register index */
360     uint16 LowThreshold;         /*!< Lower threshold */
361     uint16 HighThreshold;        /*!< Upper threshold */
362     boolean LowThresholdIntEn;     /*!< Enable interrupt when lower threshold exceeded */
363     boolean HighThresholdIntEn;    /*!< Enable interrupt when upper threshold exceeded */
364 } Adc_Sar_Ip_WdgThresholdType;
365 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
366 
367 /*!
368  * @brief Defines the data regarding a conversion, beyond the conversion data.
369  *
370  * This structure is used to return information about conversions beyond just conversion data
371  *
372  * Implements : Adc_Sar_Ip_ChanResultType_Class
373  */
374 typedef struct {
375     uint8 AdcChnIdx;       /*!< ADC Channel Index */
376     boolean ValidFlag;       /*!< Data Valid Flag */
377     boolean OverWrittenFlag; /*!< Data Overwritten Flag */
378     uint16 ConvData;   /*!< Conversion Data */
379 } Adc_Sar_Ip_ChanResultType;
380 
381 /*!
382  * @brief Defines configuration of channels in a chain
383  *
384  * This structure is used to configure channels in chain.
385  *
386  * Implements : Adc_Sar_Ip_ChansIdxMaskType_Class
387  */
388 typedef struct
389 {
390     uint32 ChanMaskArr[ADC_SAR_IP_NUM_GROUP_CHAN];  /*!< Bit-mask used to configure channels in chain */
391 } Adc_Sar_Ip_ChansIdxMaskType;
392 
393 #if (STD_ON == ADC_SAR_IP_SELFTEST_ENABLED)
394 /*!
395  * @brief Defines configuration of self-test threshold values
396  *
397  * This structure is used to configure self-test threshold values.
398  *
399  * Implements : Adc_Sar_Ip_SelfTestThresholdType_Class
400  */
401 typedef struct
402 {
403 #ifdef ADC_STAW0R_AWDE
404     uint16 AdcSTAW0RHighVal;  /*!< Adc STAW0R threshold high value */
405     uint16 AdcSTAW0RLowVal;   /*!< Adc STAW0R threshold low value */
406 #endif /* ADC_STAW0R_AWDE */
407 #ifdef ADC_STAW1R_AWDE
408     uint16 AdcSTAW1RLowVal;   /*!< Adc STAW1R threshold low value */
409 #endif /* ADC_STAW1AR_AWDE */
410 #ifdef ADC_STAW1AR_AWDE
411     uint16 AdcSTAW1ARHighVal; /*!< Adc STAW1AR threshold high value */
412     uint16 AdcSTAW1ARLowVal;  /*!< Adc STAW1AR threshold low value */
413     uint16 AdcSTAW1BRHighVal; /*!< Adc STAW1BR threshold high value */
414     uint16 AdcSTAW1BRLowVal;  /*!< Adc STAW1BR threshold low value */
415 #endif /* ADC_STAW1AR_AWDE */
416 #ifdef ADC_STAW2R_AWDE
417     uint16 AdcSTAW2RLowVal;   /*!< Adc STAW2R threshold low value */
418 #endif /* ADC_STAW2R_AWDE */
419 #ifdef ADC_STAW4R_AWDE
420     uint16 AdcSTAW4RHighVal;  /*!< Adc STAW4R threshold high value */
421     sint16 AdcSTAW4RLowVal;   /*!< Adc STAW4R threshold low value */
422     uint16 AdcSTAW5RHighVal;  /*!< Adc STAW5R threshold high value */
423     sint16 AdcSTAW5RLowVal;   /*!< Adc STAW5R threshold low value */
424 #endif /* ADC_STAW4R_AWDE */
425 } Adc_Sar_Ip_SelfTestThresholdType;
426 #endif /* (STD_ON == ADC_SAR_IP_SELFTEST_ENABLED) */
427 
428 /*!
429  * @brief Defines the module configuration
430  *
431  * This structure is used to configure the ADC_SAR module
432  *
433  * Implements : Adc_Sar_Ip_ConfigType_Class
434  */
435 typedef struct
436 {
437     Adc_Sar_Ip_ConvModeType ConvMode;  /*!< Conversion Mode (One-shot or Scan) */
438 #if (ADC_SAR_IP_SET_RESOLUTION == STD_ON)
439     Adc_Sar_Ip_Resolution AdcResolution; /*!< Adc resolution */
440     boolean BypassResolution;            /*!< Bypass Adc resolution processing for the result */
441 #endif /* (ADC_SAR_IP_SET_RESOLUTION == STD_ON) */
442     Adc_Sar_Ip_ClockSelType ClkSelect; /*!< Clock input */
443     Adc_Sar_Ip_ClockSelType CalibrationClkSelect; /*!< Clock input for calibration */
444 #if FEATURE_ADC_HAS_HIGH_SPEED_ENABLE
445     boolean HighSpeedConvEn; /* Enables high speed conversion or calibration */
446 #endif /* FEATURE_ADC_HAS_HIGH_SPEED_ENABLE */
447 #if FEATURE_ADC_HAS_CTU
448     Adc_Sar_Ip_CtuModeType CtuMode;     /*!< CTU mode */
449 #endif /* FEATURE_ADC_HAS_CTU */
450 #if (ADC_SAR_IP_EXTERNAL_TRIGGER_ENABLE)
451 #if FEATURE_ADC_HAS_INJ_EXT_TRIGGER
452     Adc_Sar_Ip_ExtTriggerEdgeType InjectedEdge;   /*!< Injected Trigger selection */
453 #endif /* FEATURE_ADC_HAS_INJ_EXT_TRIGGER */
454 #if FEATURE_ADC_HAS_EXT_TRIGGER
455     Adc_Sar_Ip_ExtTriggerEdgeType ExtTrigger;     /*!< External Trigger selection */
456     boolean NormalExtTrgEn;                       /*!< Enables normal trigger source */
457 #if FEATURE_ADC_HAS_AUX_EXT_TRIGGER
458     boolean NormalAuxExtTrgEn;                    /*!< Enables auxiliary normal trigger source */
459 #endif /* FEATURE_ADC_HAS_AUX_EXT_TRIGGER */
460 #endif /* FEATURE_ADC_HAS_EXT_TRIGGER */
461 #endif /* (ADC_SAR_IP_EXTERNAL_TRIGGER_ENABLE) */
462 #if FEATURE_ADC_HAS_CONVERSION_TIMING
463     uint8 SampleTimeArr[ADC_SAR_IP_NUM_GROUP_CHAN]; /*!< Sample time for each channel group */
464 #endif /* FEATURE_ADC_HAS_CONVERSION_TIMING */
465 #if FEATURE_ADC_HAS_PRESAMPLING
466     boolean BypassSampling;  /* PSCR[PRECONV] */
467     Adc_Sar_Ip_PresamplingSourceType PresamplingSourceArr[ADC_SAR_IP_NUM_GROUP_CHAN]; /*!< Presampling sources for each channel group */
468 #endif /* FEATURE_ADC_HAS_PRESAMPLING */
469     boolean AutoClockOff; /*!< Enable Auto Clock Off */
470     boolean OverwriteEnable; /*!< Overwrite new conversion data over old data */
471     Adc_Sar_Ip_DataAlignedType DataAlign; /*!< Data alignment in conversion result register */
472 #if FEATURE_ADC_SAR_DECODE_DELAY
473     uint16 DecodeDelay; /*!< Delay for decoding Input MUX channels */
474 #endif /* FEATURE_ADC_SAR_DECODE_DELAY */
475     uint8 PowerDownDelay; /*!< Delay before entering Power Down */
476 #if FEATURE_ADC_HAS_CLOCK_DIVIDER
477     boolean ClkDivEnable;               /*!< Clock divider enable */
478 #endif /* FEATURE_ADC_HAS_CLOCK_DIVIDER */
479 #if (STD_ON == ADC_SAR_IP_SELFTEST_ENABLED)
480     const Adc_Sar_Ip_SelfTestThresholdType * SelfTestThresholdConfig; /*!< Self test threshold configuration */
481 #endif /* (STD_ON == ADC_SAR_IP_SELFTEST_ENABLED) */
482 #if FEATURE_ADC_HAS_AVERAGING
483     boolean AvgEn;
484     Adc_Sar_Ip_AvgSelectType AvgSel;
485 #endif /* FEATURE_ADC_HAS_AVERAGING */
486     uint8 UsrOffset;
487     uint16 UsrGain;
488     boolean DmaEnable;                         /* Enables DMA */
489     Adc_Sar_Ip_ClearSourceType DmaClearSource; /* Select event to clear DMA request */
490 
491     uint32 ChanMaskNormal[ADC_SAR_IP_NUM_GROUP_CHAN];     /*!< Bit-mask used to configure Normal Chain */
492     uint32 ChanMaskInjected[ADC_SAR_IP_NUM_GROUP_CHAN];   /*!< Bit-mask used to configure Injected Chain */
493 
494     uint8 NumChannels;
495     const Adc_Sar_Ip_ChanConfigType * ChannelConfigsPtr;
496 
497 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
498     uint8 NumWdgThresholds;
499     const Adc_Sar_Ip_WdgThresholdType * WdgThresholds;
500 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
501 
502 #if (STD_ON == ADC_SAR_IP_ECH_ENABLED)
503     void (*EndOfNormalChainNotification)(void);
504 #endif /* (STD_ON == ADC_SAR_IP_ECH_ENABLED) */
505 #if (STD_ON == ADC_SAR_IP_JECH_ENABLED)
506     void (*EndOfInjectedChainNotification)(void);
507 #endif /* (STD_ON == ADC_SAR_IP_JECH_ENABLED) */
508 #if FEATURE_ADC_HAS_CTU
509 #if (STD_ON == ADC_SAR_IP_EOCTU_ENABLED)
510     void (*EndOfCtuConversionNotification)(void);
511 #endif /* (STD_ON == ADC_SAR_IP_EOCTU_ENABLED) */
512 #endif /* FEATURE_ADC_HAS_CTU */
513 
514     /* Individual channel notifications */
515 #if (STD_ON == ADC_SAR_IP_EOC_ENABLED)
516     Adc_Sar_Ip_ChanNotificationType * EndOfConvNotification;
517 #endif /* (STD_ON == ADC_SAR_IP_EOC_ENABLED) */
518 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
519     Adc_Sar_Ip_WdgNotificationType * WdgOutOfRangeNotification;
520 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
521 } Adc_Sar_Ip_ConfigType;
522 
523 /*!
524  * @brief Structure used to store runtime info
525  *
526  * This structure is used to store ADC SAR runtime info
527  *
528  * Implements : Adc_Sar_Ip_StateStructType_Class
529  */
530 typedef struct
531 {
532     boolean InitStatus;                                   /*!< Check if the driver was initialized. */
533     Adc_Sar_Ip_DataAlignedType DataAlign;           /*!< Data alignment in conversion result register */
534     Adc_Sar_Ip_ClockSelType CalibrationClkSelect;   /*!< Clock input for calibration */
535 #if (ADC_SAR_IP_SET_RESOLUTION == STD_ON)
536     boolean BypassResolution;                       /*!< Adc raw data result */
537 #endif /* (ADC_SAR_IP_SET_RESOLUTION == STD_ON) */
538 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
539     uint32 ChanWdgThresholdIndex[ADC_SAR_IP_CDR_COUNT]; /*!< Channel index to threshold index mapping */
540 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
541 
542     /* General notifications */
543 #if (STD_ON == ADC_SAR_IP_ECH_ENABLED)
544     void (*EndOfNormalChainNotification)(void);
545 #endif /* (STD_ON == ADC_SAR_IP_ECH_ENABLED) */
546 #if (STD_ON == ADC_SAR_IP_JECH_ENABLED)
547     void (*EndOfInjectedChainNotification)(void);
548 #endif /* (STD_ON == ADC_SAR_IP_JECH_ENABLED) */
549 #if FEATURE_ADC_HAS_CTU
550 #if (STD_ON == ADC_SAR_IP_EOCTU_ENABLED)
551     void (*EndOfCtuConversionNotification)(void);
552 #endif /* (STD_ON == ADC_SAR_IP_EOCTU_ENABLED) */
553 #endif /* FEATURE_ADC_HAS_CTU */
554 
555     /* Individual channel notifications */
556 #if (STD_ON == ADC_SAR_IP_EOC_ENABLED)
557     Adc_Sar_Ip_ChanNotificationType * EndOfConvNotification;
558 #endif /* (STD_ON == ADC_SAR_IP_EOC_ENABLED) */
559 #if (STD_ON == ADC_SAR_IP_WDG_ENABLED)
560     Adc_Sar_Ip_WdgNotificationType * WdgOutOfRangeNotification;
561 #endif /* (STD_ON == ADC_SAR_IP_WDG_ENABLED) */
562 } Adc_Sar_Ip_StateStructType;
563 
564 #ifdef __cplusplus
565 }
566 #endif
567 
568 /** @} */
569 
570 #endif /* ADC_SAR_IP_TYPES_H */
571