Searched refs:tmpReg (Results 1 – 9 of 9) sorted by relevance
235 uint32_t tmpReg = 0U; in ADC_ETC_SetTriggerChainConfig() local255 tmpReg = base->TRIG[triggerGroup].TRIGn_CHAIN_1_0; in ADC_ETC_SetTriggerChainConfig()258 … tmpReg &= ~(ADC_ETC_TRIGn_CHAIN_1_0_CSEL0_MASK | ADC_ETC_TRIGn_CHAIN_1_0_HWTS0_MASK | in ADC_ETC_SetTriggerChainConfig()260 tmpReg |= tmp32; in ADC_ETC_SetTriggerChainConfig()264 … tmpReg &= ~(ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_MASK | ADC_ETC_TRIGn_CHAIN_1_0_HWTS1_MASK | in ADC_ETC_SetTriggerChainConfig()266 tmpReg |= (tmp32 << ADC_ETC_TRIGn_CHAIN_1_0_CSEL1_SHIFT); in ADC_ETC_SetTriggerChainConfig()268 base->TRIG[triggerGroup].TRIGn_CHAIN_1_0 = tmpReg; in ADC_ETC_SetTriggerChainConfig()271 tmpReg = base->TRIG[triggerGroup].TRIGn_CHAIN_3_2; in ADC_ETC_SetTriggerChainConfig()274 … tmpReg &= ~(ADC_ETC_TRIGn_CHAIN_3_2_CSEL2_MASK | ADC_ETC_TRIGn_CHAIN_3_2_HWTS2_MASK | in ADC_ETC_SetTriggerChainConfig()276 tmpReg |= tmp32; in ADC_ETC_SetTriggerChainConfig()[all …]
38 uint32_t tmpReg = 0U; in CMP_Init() local50 …tmpReg = (PMC->COMP & ~(PMC_COMP_LOWPOWER_MASK | PMC_COMP_HYST_MASK | PMC_COMP_FILTERCGF_CLKDIV_MA… in CMP_Init()55 tmpReg |= PMC_COMP_LOWPOWER_MASK; in CMP_Init()59 tmpReg &= ~PMC_COMP_LOWPOWER_MASK; in CMP_Init()64 tmpReg |= PMC_COMP_HYST_MASK; in CMP_Init()68 tmpReg &= ~PMC_COMP_HYST_MASK; in CMP_Init()71 tmpReg |= (PMC_COMP_FILTERCGF_CLKDIV(config->filterClockDivider) | in CMP_Init()74 PMC->COMP = tmpReg; in CMP_Init()123 uint32_t tmpReg = PMC->COMP & ~(PMC_COMP_VREF_MASK | PMC_COMP_VREFINPUT_MASK); in CMP_SetVREF() local125 tmpReg |= PMC_COMP_VREFINPUT(config->vrefSource) | PMC_COMP_VREF(config->vrefValue); in CMP_SetVREF()[all …]
92 uint8_t tmpReg; in I2C_MasterTransferCallbackEDMA() local115 … tmpReg = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackEDMA()117 *(i2cPrivateHandle->handle->transfer.data + tmpdataSize - 1U) = tmpReg; in I2C_MasterTransferCallbackEDMA()146 … tmpReg = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackEDMA()148 *(i2cPrivateHandle->handle->transfer.data + tmpdataSize - 1U) = tmpReg; in I2C_MasterTransferCallbackEDMA()448 uint8_t tmpReg; in I2C_MasterTransferEDMA() local504 tmpReg = base->C1; in I2C_MasterTransferEDMA()507 tmpReg &= ~(uint8_t)I2C_C1_TX_MASK; in I2C_MasterTransferEDMA()510 tmpReg |= I2C_C1_TXAK_MASK; in I2C_MasterTransferEDMA()512 base->C1 = tmpReg; in I2C_MasterTransferEDMA()[all …]
440 uint8_t tmpReg; in I2C_MasterTransferDMA() local497 tmpReg = base->C1; in I2C_MasterTransferDMA()500 tmpReg &= ~(uint8_t)I2C_C1_TX_MASK; in I2C_MasterTransferDMA()503 tmpReg |= I2C_C1_TXAK_MASK; in I2C_MasterTransferDMA()505 base->C1 = tmpReg; in I2C_MasterTransferDMA()
1714 uint8_t tmpReg; in I2C_SlaveInit() local1754 tmpReg = base->C1; in I2C_SlaveInit()1755 tmpReg &= ~(uint8_t)I2C_C1_WUEN_MASK; in I2C_SlaveInit()1756 …base->C1 = tmpReg | I2C_C1_WUEN(slaveConfig->enableWakeUp) | I2C_C1_IICEN(slaveConfig->enableSlave… in I2C_SlaveInit()1759 tmpReg = base->C2; in I2C_SlaveInit()1760 tmpReg &= ~(uint8_t)(I2C_C2_SBRC_MASK | I2C_C2_GCAEN_MASK); in I2C_SlaveInit()1761 …tmpReg |= I2C_C2_SBRC(slaveConfig->enableBaudRateCtl) | I2C_C2_GCAEN(slaveConfig->enableGeneralCal… in I2C_SlaveInit()1762 base->C2 = tmpReg; in I2C_SlaveInit()1766 tmpReg = (uint8_t)(base->S2 & (~I2C_S2_DFEN_MASK)); in I2C_SlaveInit()1767 base->S2 = tmpReg | I2C_S2_DFEN(slaveConfig->enableDoubleBuffering); in I2C_SlaveInit()
189 …uint32_t tmpReg = (DMA_CHANNEL_CFG_HWTRIGEN_MASK | DMA_CHANNEL_CFG_TRIGPOL_MASK | DMA_CHANNEL_CFG_… in DMA_ConfigureChannelTrigger() local192 tmpReg = base->CHANNEL[channel].CFG & (~tmpReg); in DMA_ConfigureChannelTrigger()193 tmpReg |= (uint32_t)(trigger->type) | (uint32_t)(trigger->burst) | (uint32_t)(trigger->wrap); in DMA_ConfigureChannelTrigger()194 base->CHANNEL[channel].CFG = tmpReg; in DMA_ConfigureChannelTrigger()626 uint32_t tmpReg = DMA_CHANNEL_CFG_PERIPHREQEN_MASK; in DMA_SetChannelConfig() local630 …tmpReg |= DMA_CHANNEL_CFG_HWTRIGEN_MASK | DMA_CHANNEL_CFG_TRIGPOL_MASK | DMA_CHANNEL_CFG_TRIGTYPE_… in DMA_SetChannelConfig()635 tmpReg = base->CHANNEL[channel].CFG & (~tmpReg); in DMA_SetChannelConfig()639 … tmpReg |= (uint32_t)(trigger->type) | (uint32_t)(trigger->burst) | (uint32_t)(trigger->wrap); in DMA_SetChannelConfig()642 tmpReg |= DMA_CHANNEL_CFG_PERIPHREQEN(isPeriph); in DMA_SetChannelConfig()644 base->CHANNEL[channel].CFG = tmpReg; in DMA_SetChannelConfig()
633 uint32_t tmpReg = 0U; in LPI2C_MasterSetBaudRate() local725 tmpReg = LPI2C_MCCR0_CLKHI((uint32_t)tmpHigh) | in LPI2C_MasterSetBaudRate()728 base->MCCR0 = tmpReg; in LPI2C_MasterSetBaudRate()1799 uint32_t tmpReg; in LPI2C_SlaveInit() local1830 tmpReg = LPI2C_SCFGR2_FILTSDA( in LPI2C_SlaveInit()1839 tmpReg |= LPI2C_SCFGR2_FILTSCL(tmpCycle - 3U); in LPI2C_SlaveInit()1843 tmpReg |= LPI2C_SCFGR2_DATAVD( in LPI2C_SlaveInit()1851 tmpReg | LPI2C_SCFGR2_CLKHOLD( in LPI2C_SlaveInit()
358 uint8_t tmpReg; in OV7725_Init() local504 …tmpReg = (((uint8_t)vstart & 1U) << 6U) | (((uint8_t)hstart & 3U) << 4U) | (((uint8_t)height & 1U)… in OV7725_Init()507 OV7725_CHECK_RET(OV7725_WriteReg(handle, OV7725_HREF_REG, tmpReg)); in OV7725_Init()
301 volatile uint8_t *tmpReg = &base->DCHPRI3; in EDMA_SetChannelPreemptionConfig() local303 ((volatile uint8_t *)tmpReg)[DMA_DCHPRI_INDEX(channel)] = in EDMA_SetChannelPreemptionConfig()
