1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
7  *
8  * o Redistributions of source code must retain the above copyright notice, this list
9  *   of conditions and the following disclaimer.
10  *
11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  *   list of conditions and the following disclaimer in the documentation and/or
13  *   other materials provided with the distribution.
14  *
15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16  *   contributors may be used to endorse or promote products derived from this
17  *   software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __SEMA4_H__
32 #define __SEMA4_H__
33 
34 #include <stdint.h>
35 #include <stdbool.h>
36 #include "device_imx.h"
37 
38 /*!
39  * @addtogroup sema4_driver
40  * @{
41  */
42 
43 /*******************************************************************************
44  * Definitions
45  ******************************************************************************/
46 #define SEMA4_PROCESSOR_NONE         (0xFF)
47 #define SEMA4_GATE_STATUS_FLAG(gate) ((uint16_t)(1U << ((gate) ^ 7)))
48 
49 /*! @brief Status flag. */
50 enum _sema4_status_flag
51 {
52     sema4StatusFlagGate0  = 1U << 7,  /*!< Sema4 Gate 0 flag. */
53     sema4StatusFlagGate1  = 1U << 6,  /*!< Sema4 Gate 1 flag. */
54     sema4StatusFlagGate2  = 1U << 5,  /*!< Sema4 Gate 2 flag. */
55     sema4StatusFlagGate3  = 1U << 4,  /*!< Sema4 Gate 3 flag. */
56     sema4StatusFlagGate4  = 1U << 3,  /*!< Sema4 Gate 4 flag. */
57     sema4StatusFlagGate5  = 1U << 2,  /*!< Sema4 Gate 5 flag. */
58     sema4StatusFlagGate6  = 1U << 1,  /*!< Sema4 Gate 6 flag. */
59     sema4StatusFlagGate7  = 1U << 0,  /*!< Sema4 Gate 7 flag. */
60     sema4StatusFlagGate8  = 1U << 15, /*!< Sema4 Gate 8 flag. */
61     sema4StatusFlagGate9  = 1U << 14, /*!< Sema4 Gate 9 flag. */
62     sema4StatusFlagGate10 = 1U << 13, /*!< Sema4 Gate 10 flag. */
63     sema4StatusFlagGate11 = 1U << 12, /*!< Sema4 Gate 11 flag. */
64     sema4StatusFlagGate12 = 1U << 11, /*!< Sema4 Gate 12 flag. */
65     sema4StatusFlagGate13 = 1U << 10, /*!< Sema4 Gate 13 flag. */
66     sema4StatusFlagGate14 = 1U << 9,  /*!< Sema4 Gate 14 flag. */
67     sema4StatusFlagGate15 = 1U << 8,  /*!< Sema4 Gate 15 flag. */
68 };
69 
70 /*! @brief SEMA4 reset finite state machine. */
71 enum _sema4_reset_state
72 {
73     sema4ResetIdle     = 0U, /*!< Idle, waiting for the first data pattern write. */
74     sema4ResetMid      = 1U, /*!< Waiting for the second data pattern write.      */
75     sema4ResetFinished = 2U, /*!< Reset completed. Software can't get this state. */
76 };
77 
78 /*! @brief SEMA4 status return codes. */
79 typedef enum _sema4_status
80 {
81     statusSema4Success = 0U, /*!< Success.                                       */
82     statusSema4Busy    = 1U, /*!< SEMA4 gate has been locked by other processor. */
83 } sema4_status_t;
84 
85 /*******************************************************************************
86  * API
87  ******************************************************************************/
88 
89 #if defined(__cplusplus)
90 extern "C" {
91 #endif
92 
93 /*!
94  * @name SEMA4 State Control
95  * @{
96  */
97 
98 /*!
99  * @brief Lock SEMA4 gate for exclusive access between multicore.
100  *
101  * @param base SEMA4 base pointer.
102  * @param gateIndex SEMA4 gate index.
103  * @retval statusSema4Success Lock the gate successfully.
104  * @retval statusSema4Busy    SEMA4 gate has been locked by other processor.
105  */
106 sema4_status_t SEMA4_TryLock(SEMA4_Type *base, uint32_t gateIndex);
107 
108 /*!
109  * @brief Lock SEMA4 gate for exclusive access between multicore, polling until success.
110  *
111  * @param base SEMA4 base pointer.
112  * @param gateIndex SEMA4 gate index.
113  */
114 void SEMA4_Lock(SEMA4_Type *base, uint32_t gateIndex);
115 
116 /*!
117  * @brief Unlock SEMA4 gate.
118  *
119  * @param base SEMA4 base pointer.
120  * @param gateIndex SEMA4 gate index.
121  */
122 void SEMA4_Unlock(SEMA4_Type *base, uint32_t gateIndex);
123 
124 /*!
125  * @brief Get processor number which locks the SEMA4 gate.
126  *
127  * @param base SEMA4 base pointer.
128  * @param gateIndex SEMA4 gate index.
129  * @return processor number which locks the SEMA4 gate, or SEMA4_PROCESSOR_NONE
130  *         to indicate the gate is not locked.
131  */
132 uint32_t SEMA4_GetLockProcessor(SEMA4_Type *base, uint32_t gateIndex);
133 
134 /*@}*/
135 
136 /*!
137  * @name SEMA4 Reset Control
138  * @{
139  */
140 
141 /*!
142  * @brief Reset SEMA4 gate to unlocked status.
143  *
144  * @param base SEMA4 base pointer.
145  * @param gateIndex SEMA4 gate index.
146  */
147 void SEMA4_ResetGate(SEMA4_Type *base, uint32_t gateIndex);
148 
149 /*!
150  * @brief Reset all SEMA4 gates to unlocked status.
151  *
152  * @param base SEMA4 base pointer.
153  */
154 void SEMA4_ResetAllGates(SEMA4_Type *base);
155 
156 /*!
157  * @brief Get bus master number which performing the gate reset function.
158  *        This function gets the bus master number which performing the
159  *        gate reset function.
160  *
161  * @param base SEMA4 base pointer.
162  * @return Bus master number.
163  */
SEMA4_GetGateResetBus(SEMA4_Type * base)164 static inline uint8_t SEMA4_GetGateResetBus(SEMA4_Type *base)
165 {
166     return (uint8_t)(base->RSTGT & 7);
167 }
168 
169 /*!
170  * @brief Get sema4 gate reset state.
171  *        This function gets current state of the sema4 reset gate finite
172  *        state machine.
173  *
174  * @param base SEMA4 base pointer.
175  * @return Current state (see @ref _sema4_reset_state).
176  */
SEMA4_GetGateResetState(SEMA4_Type * base)177 static inline uint8_t SEMA4_GetGateResetState(SEMA4_Type *base)
178 {
179     return (uint8_t)((base->RSTGT & 0x30) >> 4);
180 }
181 
182 /*!
183  * @brief Reset SEMA4 IRQ notification.
184  *
185  * @param base SEMA4 base pointer.
186  * @param gateIndex SEMA4 gate index.
187  */
188 void SEMA4_ResetNotification(SEMA4_Type *base, uint32_t gateIndex);
189 
190 /*!
191  * @brief Reset all IRQ notifications.
192  *
193  * @param base SEMA4 base pointer.
194  */
195 void SEMA4_ResetAllNotifications(SEMA4_Type *base);
196 
197 /*!
198  * @brief Get bus master number which performing the notification reset function.
199  *        This function gets the bus master number which performing the notification
200  *        reset function.
201  *
202  * @param base SEMA4 base pointer.
203  * @return Bus master number.
204  */
SEMA4_GetNotificationResetBus(SEMA4_Type * base)205 static inline uint8_t SEMA4_GetNotificationResetBus(SEMA4_Type *base)
206 {
207     return (uint8_t)(base->RSTNTF & 7);
208 }
209 
210 /*!
211  * @brief Get sema4 notification reset state.
212  *
213  * This function gets current state of the sema4 reset notification finite state machine.
214  *
215  * @param base SEMA4 base pointer.
216  * @return Current state (See @ref _sema4_reset_state).
217  */
SEMA4_GetNotificationResetState(SEMA4_Type * base)218 static inline uint8_t SEMA4_GetNotificationResetState(SEMA4_Type *base)
219 {
220     return (uint8_t)((base->RSTNTF & 0x30) >> 4);
221 }
222 
223 /*@}*/
224 
225 /*!
226  * @name SEMA4 Interrupt and Status Control
227  * @{
228  */
229 
230 /*!
231  * @brief Get SEMA4 notification status.
232  *
233  * @param base SEMA4 base pointer.
234  * @param flags SEMA4 gate status mask (See @ref _sema4_status_flag).
235  * @return SEMA4 notification status bits. If bit value is set, the corresponding
236  *         gate's notification is available.
237  */
SEMA4_GetStatusFlag(SEMA4_Type * base,uint16_t flags)238 static inline uint16_t SEMA4_GetStatusFlag(SEMA4_Type * base, uint16_t flags)
239 {
240     return base->CPnNTF[SEMA4_PROCESSOR_SELF].NTF & flags;
241 }
242 
243 /*!
244  * @brief Enable or disable SEMA4 IRQ notification.
245  *
246  * @param base SEMA4 base pointer.
247  * @param intMask SEMA4 gate status mask (see @ref _sema4_status_flag).
248  * @param enable Enable/Disable Sema4 interrupt, only those gates whose intMask is set are affected.
249  *               - true: Enable Sema4 interrupt.
250  *               - false: Disable Sema4 interrupt.
251  */
252 void SEMA4_SetIntCmd(SEMA4_Type * base, uint16_t intMask, bool enable);
253 
254 /*!
255  * @brief check whether SEMA4 IRQ notification enabled.
256  *
257  * @param base SEMA4 base pointer.
258  * @param flags SEMA4 gate status mask (see @ref _sema4_status_flag).
259  * @return SEMA4 notification interrupt enable status bits. If bit value is set,
260  *         the corresponding gate's notification is enabled
261  */
SEMA4_GetIntEnabled(SEMA4_Type * base,uint16_t flags)262 static inline uint16_t SEMA4_GetIntEnabled(SEMA4_Type * base, uint16_t flags)
263 {
264     return base->CPnINE[SEMA4_PROCESSOR_SELF].INE & flags;
265 }
266 
267 /*@}*/
268 
269 #if defined(__cplusplus)
270 }
271 #endif
272 
273 /*! @}*/
274 
275 #endif /* __SEMA4_H__ */
276 /*******************************************************************************
277  * EOF
278  ******************************************************************************/
279