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Searched refs:regDiv (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm.c35 uint32_t regDiv);
144 uint32_t regDiv) in PDM_ValidateSrcClockRate() argument
195 … if (((regDiv * k) / 2U * 100U) < (((10U + factor * enabledChannel) * 100U / (8U * osr)) * k / 2U)) in PDM_ValidateSrcClockRate()
227 uint32_t regDiv = 0U; in PDM_SetSampleRateConfig() local
232 regDiv = sourceClock_HZ / pdmClockRate; in PDM_SetSampleRateConfig()
234 if (regDiv > PDM_CTRL_2_CLKDIV_MASK) in PDM_SetSampleRateConfig()
240 …if (PDM_ValidateSrcClockRate(enabledChannelMask, qualityMode, (uint8_t)osr, regDiv) == kStatus_Fai… in PDM_SetSampleRateConfig()
246 base->CTRL_2 = (base->CTRL_2 & (~PDM_CTRL_2_CLKDIV_MASK)) | PDM_CTRL_2_CLKDIV(regDiv); in PDM_SetSampleRateConfig()
267 uint32_t regDiv = clkDiv >> 1U; in PDM_SetSampleRate() local
272 regDiv <<= 1U; in PDM_SetSampleRate()
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