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Searched refs:ptrMemSpCtrlReg (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_pgmc.c235 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
245 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_CACHE_ControlBySetPointMode()
254 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_CACHE_ControlBySetPointMode()
335 volatile uint32_t *ptrMemSpCtrlReg = NULL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
341 ptrMemSpCtrlReg = &(base->CPC_LMEM_SP_CTRL_0); in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
345 tmp32 = *ptrMemSpCtrlReg; in PGMC_CPC_LMEM_ControlBySetPointMode()
354 *ptrMemSpCtrlReg = tmp32; in PGMC_CPC_LMEM_ControlBySetPointMode()