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Searched refs:postDivider (Results 1 – 25 of 60) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
687 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
776 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
781 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv2; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
796 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
801 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
841 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
687 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
776 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
781 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv2; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
796 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
801 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
841 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
687 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
776 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
781 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv2; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
796 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
801 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
841 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
687 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
776 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
781 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv2; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
796 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
801 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
841 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
687 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
776 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
781 config->postDivider = kCLOCK_PllPostDiv1; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv2; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
796 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
801 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
841 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
693 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
782 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
832 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
838 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
844 config->postDivider = 1; in CLOCK_CalcAvPllFreq()
850 config->postDivider = 2; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c129 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider))) in CLOCK_InitArmPll()
157 ANADIG_PLL_ARM_PLL_CTRL_POST_DIV_SEL(config->postDivider)) | in CLOCK_InitArmPll()
693 …ANATOP_PllConfigure(kAI_Itf_Audio, config->loopDivider, config->numerator, config->postDivider, co… in CLOCK_InitAudioPll()
782 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
786 config->postDivider = kCLOCK_PllPostDiv4; in CLOCK_CalcArmPllFreq()
791 config->postDivider = kCLOCK_PllPostDiv8; in CLOCK_CalcArmPllFreq()
832 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
838 config->postDivider = 0; in CLOCK_CalcAvPllFreq()
844 config->postDivider = 1; in CLOCK_CalcAvPllFreq()
850 config->postDivider = 2; in CLOCK_CalcAvPllFreq()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/project_template/
Dclock_config.c229 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
251 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
261 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/project_template/
Dclock_config.c229 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
251 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
261 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/project_template/
Dclock_config.c233 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
255 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
265 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/project_template/
Dclock_config.c233 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
255 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
265 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/project_template/
Dclock_config.c233 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
255 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
265 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/project_template/
Dclock_config.c233 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
255 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
265 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/project_template/
Dclock_config.c233 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
255 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
265 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1160/
Dclock_config.c252 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
266 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
1002 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
1016 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1160/project_template/
Dclock_config.c252 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
266 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
1002 ….postDivider = kCLOCK_PllPostDiv4, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
1016 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1170/
Dclock_config.c257 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
271 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
1070 ….postDivider = kCLOCK_PllPostDiv1, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
1084 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1170/project_template/
Dclock_config.c257 ….postDivider = kCLOCK_PllPostDiv2, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
271 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
1070 ….postDivider = kCLOCK_PllPostDiv1, /* Post divider, 0 - DIV by 2, 1 - DIV by 4, 2 - DIV by …
1084 ….postDivider = 0, /* Divider after PLL, should only be 1, 2, 4, 8, 16, 32 …
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbimxrt1050/
Dclock_config.c161 .postDivider = 8, /* Divider after PLL */
606 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbimxrt1050/project_template/
Dclock_config.c161 .postDivider = 8, /* Divider after PLL */
606 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1040/
Dclock_config.c164 .postDivider = 8, /* Divider after PLL */
590 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1040/project_template/
Dclock_config.c164 .postDivider = 8, /* Divider after PLL */
590 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbmimxrt1060/
Dclock_config.c168 .postDivider = 8, /* Divider after PLL */
627 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbmimxrt1060/project_template/
Dclock_config.c168 .postDivider = 8, /* Divider after PLL */
627 .postDivider = 8, /* Divider after PLL */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1060/project_template/
Dclock_config.c168 .postDivider = 8, /* Divider after PLL */
627 .postDivider = 8, /* Divider after PLL */

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