Home
last modified time | relevance | path

Searched refs:phyAddr (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/components/phyksz8081/
Dfsl_phy.c30 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
49 (void)PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); in PHY_Init()
60 result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
65 result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data); in PHY_Init()
70 result = PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK)); in PHY_Init()
78 result = PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, in PHY_Init()
84 …PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_M… in PHY_Init()
90 result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &bssReg); in PHY_Init()
93 (void)PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg); in PHY_Init()
117 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() argument
[all …]
Dfsl_phy.h124 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
137 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
150 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
165 status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, …
178 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
190 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t…
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phylan8720a/
Dfsl_phy.c30 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz) in PHY_Init() argument
51 (void)PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg); in PHY_Init()
62 (void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
65 (void)PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &reg); in PHY_Init()
74 (void)PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG, (PHY_ALL_CAPABLE_MASK | 0x1U)); in PHY_Init()
77 …(void)PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUT… in PHY_Init()
81 (void)PHY_Read(base, phyAddr, PHY_SEPCIAL_CONTROL_REG, &reg); in PHY_Init()
94 (void)PHY_GetLinkStatus(base, phyAddr, &status); in PHY_Init()
104 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data) in PHY_Write() argument
113 ENET_StartSMIWrite(base, phyAddr, phyReg, kENET_MiiWriteValidFrame, data); in PHY_Write()
[all …]
Dfsl_phy.h103 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
116 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
129 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
142 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
154 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t…
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phyksz8041/
Dfsl_phyksz8041.c62 handle->phyAddr = config->phyAddr; in PHY_KSZ8041_Init()
67 result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_ID1_REG, &regValue); in PHY_KSZ8041_Init()
81 …result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK… in PHY_KSZ8041_Init()
88 MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_AUTONEG_ADVERTISE_REG, in PHY_KSZ8041_Init()
93 result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, in PHY_KSZ8041_Init()
103 … result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, &regValue); in PHY_KSZ8041_Init()
109 … result = MDIO_Write(handle->mdioHandle, handle->phyAddr, PHY_BASICCONTROL_REG, regValue); in PHY_KSZ8041_Init()
125 return MDIO_Write(handle->mdioHandle, handle->phyAddr, phyReg, data); in PHY_KSZ8041_Write()
130 return MDIO_Read(handle->mdioHandle, handle->phyAddr, phyReg, dataPtr); in PHY_KSZ8041_Read()
143 result = MDIO_Read(handle->mdioHandle, handle->phyAddr, PHY_BASICSTATUS_REG, &regValue); in PHY_KSZ8041_GetAutoNegotiationStatus()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/mdio/enet/
Dfsl_enet_mdio.c19 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t…
20 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t …
22 static status_t ENET_MDIO_WriteExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3…
23 static status_t ENET_MDIO_ReadExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32…
63 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t… in ENET_MDIO_Write() argument
73 ENET_StartSMIWrite(base, phyAddr, devAddr, kENET_MiiWriteValidFrame, data); in ENET_MDIO_Write()
87 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t … in ENET_MDIO_Read() argument
99 ENET_StartSMIRead(base, phyAddr, devAddr, kENET_MiiReadValidFrame); in ENET_MDIO_Read()
117 static status_t ENET_MDIO_WriteExt(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3… in ENET_MDIO_WriteExt() argument
125 ENET_StartExtC45SMIWriteReg(base, phyAddr, devAddr); in ENET_MDIO_WriteExt()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/
Dfsl_mdio.h48 uint32_t phyAddr,
52 uint32_t phyAddr,
56 uint32_t phyAddr,
60 uint32_t phyAddr,
101 static inline status_t MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32… in MDIO_Write() argument
103 return handle->ops->mdioWrite(handle, phyAddr, devAddr, data); in MDIO_Write()
117 static inline status_t MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_… in MDIO_Read() argument
119 return handle->ops->mdioRead(handle, phyAddr, devAddr, dataPtr); in MDIO_Read()
Dfsl_phy.h67 typedef status_t (*mdioWrite)(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
70 typedef status_t (*mdioRead)(uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
136 uint8_t phyAddr; /*!< PHY address. */ member
149 uint8_t phyAddr; /*!< PHY address. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/mdio/enet_qos/
Dfsl_enet_qos_mdio.c20 static status_t ENET_QOS_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint…
22 static status_t ENET_QOS_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3…
51 static status_t ENET_QOS_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint… in ENET_QOS_MDIO_Write() argument
60 ENET_QOS_StartSMIWrite(base, phyAddr, devAddr, data); in ENET_QOS_MDIO_Write()
83 static status_t ENET_QOS_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint3… in ENET_QOS_MDIO_Read() argument
92 ENET_QOS_StartSMIRead(base, phyAddr, devAddr); in ENET_QOS_MDIO_Read()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/mdio/lpc_enet/
Dfsl_enet_mdio.c20 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t…
22 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t …
51 static status_t ENET_MDIO_Write(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t… in ENET_MDIO_Write() argument
60 ENET_StartSMIWrite(base, phyAddr, devAddr, data); in ENET_MDIO_Write()
83 static status_t ENET_MDIO_Read(mdio_handle_t *handle, uint32_t phyAddr, uint32_t devAddr, uint32_t … in ENET_MDIO_Read() argument
94 ENET_StartSMIRead(base, phyAddr, devAddr); in ENET_MDIO_Read()
/hal_nxp-3.5.0/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_phy_cmsis.c119 phyConfig.phyAddr = ENETPHY0_State.resource->phyAddr; in PHY0_PowerControl()
191 phyConfig.phyAddr = ENETPHY0_State.resource->phyAddr; in PHY0_SetMode()
Dfsl_enet_phy_cmsis.h31 uint8_t phyAddr; /*!< ENET PHY physical address. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phylan8720a/
Dfsl_phylan8720a.c39 ((phy_lan8720a_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
41 ((phy_lan8720a_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
71 handle->phyAddr = config->phyAddr; in PHY_LAN8720A_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phyksz8081/
Dfsl_phyksz8081.c43 (((phy_ksz8081_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data))
45 (((phy_ksz8081_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData))
76 handle->phyAddr = config->phyAddr; in PHY_KSZ8081_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phyrtl8201/
Dfsl_phyrtl8201.c24 ((phy_rtl8201_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
26 ((phy_rtl8201_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
67 handle->phyAddr = config->phyAddr; in PHY_RTL8201_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phyar8031/
Dfsl_phyar8031.c72 ((phy_ar8031_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
74 ((phy_ar8031_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
112 handle->phyAddr = config->phyAddr; in PHY_AR8031_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/phy/device/phyrtl8211f/
Dfsl_phyrtl8211f.c63 ((phy_rtl8211f_resource_t *)(handle)->resource)->write((handle)->phyAddr, regAddr, data)
65 ((phy_rtl8211f_resource_t *)(handle)->resource)->read((handle)->phyAddr, regAddr, pData)
106 handle->phyAddr = config->phyAddr; in PHY_RTL8211F_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/enet/
Dfsl_enet.h991 ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_write_t operation, uint16_t data) in ENET_StartSMIWrite() argument
993 …base->MMFR = ENET_MMFR_ST(1U) | ENET_MMFR_OP(operation) | ENET_MMFR_PA(phyAddr) | ENET_MMFR_RA(reg… in ENET_StartSMIWrite()
1009 static inline void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_re… in ENET_StartSMIRead() argument
1012 …ENET_MMFR_ST(1U) | ENET_MMFR_OP(operation) | ENET_MMFR_PA(phyAddr) | ENET_MMFR_RA(regAddr) | ENET_… in ENET_StartSMIRead()
1025 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
1037 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
Dfsl_enet.c1231 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in ENET_MDIOWrite() argument
1239 ENET_StartSMIWrite(base, phyAddr, regAddr, kENET_MiiWriteValidFrame, data); in ENET_MDIOWrite()
1263 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData) in ENET_MDIORead() argument
1273 ENET_StartSMIRead(base, phyAddr, regAddr, kENET_MiiReadValidFrame); in ENET_MDIORead()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpc_enet/
Dfsl_enet.h756 void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
765 void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr);
777 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
789 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
Dfsl_enet.c1015 void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in ENET_StartSMIWrite() argument
1020 …AC_MDIO_ADDR = reg | ENET_MAC_MDIO_ADDR_MOC(kENET_MiiWriteFrame) | ENET_MAC_MDIO_ADDR_PA(phyAddr) | in ENET_StartSMIWrite()
1034 void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr) in ENET_StartSMIRead() argument
1039 …MAC_MDIO_ADDR = reg | ENET_MAC_MDIO_ADDR_MOC(kENET_MiiReadFrame) | ENET_MAC_MDIO_ADDR_PA(phyAddr) | in ENET_StartSMIRead()
1082 status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in ENET_MDIOWrite() argument
1084 ENET_StartSMIWrite(base, phyAddr, regAddr, data); in ENET_MDIOWrite()
1099 status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData) in ENET_MDIORead() argument
1105 ENET_StartSMIRead(base, phyAddr, regAddr); in ENET_MDIORead()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/enet_qos/
Dfsl_enet_qos.h968 void ENET_QOS_StartSMIWrite(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
979 void ENET_QOS_StartSMIRead(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr);
1017 status_t ENET_QOS_MDIOWrite(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data);
1029 status_t ENET_QOS_MDIORead(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData);
Dfsl_enet_qos.c1748 void ENET_QOS_StartSMIWrite(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in ENET_QOS_StartSMIWrite() argument
1753 …AC_MDIO_ADDRESS = reg | (uint32_t)kENET_QOS_MiiWriteFrame | ENET_QOS_MAC_MDIO_ADDRESS_PA(phyAddr) | in ENET_QOS_StartSMIWrite()
1768 void ENET_QOS_StartSMIRead(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr) in ENET_QOS_StartSMIRead() argument
1773 …MAC_MDIO_ADDRESS = reg | (uint32_t)kENET_QOS_MiiReadFrame | ENET_QOS_MAC_MDIO_ADDRESS_PA(phyAddr) | in ENET_QOS_StartSMIRead()
1860 status_t ENET_QOS_MDIOWrite(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data) in ENET_QOS_MDIOWrite() argument
1862 ENET_QOS_StartSMIWrite(base, phyAddr, regAddr, data); in ENET_QOS_MDIOWrite()
1877 status_t ENET_QOS_MDIORead(ENET_QOS_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData) in ENET_QOS_MDIORead() argument
1883 ENET_QOS_StartSMIRead(base, phyAddr, regAddr); in ENET_QOS_MDIORead()