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Searched refs:pfdClkout (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.c1125 SCG_APLLCFG_PFDSEL(((uint32_t)config->pfdClkout) >> 3U) | in CLOCK_InitAuxPll()
1213 scg_apll_pfd_clkout_t pfdClkout; in CLOCK_GetAuxPllFreq() local
1218 pfdClkout = (scg_apll_pfd_clkout_t)(uint32_t)( in CLOCK_GetAuxPllFreq()
1220 freq = CLOCK_GetAuxPllPfdFreq(pfdClkout); in CLOCK_GetAuxPllFreq()
1294 uint32_t CLOCK_GetAuxPllPfdFreq(scg_apll_pfd_clkout_t pfdClkout) in CLOCK_GetAuxPllPfdFreq() argument
1299 …if ((SCG->APLLPFD & SCG_PLLPFD_PFD_VALID_MASK(pfdClkout)) != 0UL) /* Auxiliary PLL PFD is valid. */ in CLOCK_GetAuxPllPfdFreq()
1301 if (0UL == (SCG->APLLPFD & SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout))) in CLOCK_GetAuxPllPfdFreq()
1303 fracValue = (SCG->APLLPFD & SCG_PLLPFD_PFD_MASK(pfdClkout)) >> (uint32_t)pfdClkout; in CLOCK_GetAuxPllPfdFreq()
1357 void CLOCK_EnableAuxPllPfdClkout(scg_apll_pfd_clkout_t pfdClkout, uint8_t fracValue) in CLOCK_EnableAuxPllPfdClkout() argument
1367 SCG->APLLPFD &= ~SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout); in CLOCK_EnableAuxPllPfdClkout()
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Dfsl_clock.h57 #define SCG_PLLPFD_PFD_VAL(pfdClkout, fracValue) ((uint32_t)((uint32_t)(fracValue) << (uint32_t)(pf… argument
61 #define SCG_PLLPFD_PFD_MASK(pfdClkout) ((uint32_t)((uint32_t)(SCG_APLLPFD_PFD0_MASK) << (uint32_t)( argument
65 #define SCG_PLLPFD_PFD_VALID_MASK(pfdClkout) \ argument
66 ((uint32_t)((uint32_t)SCG_APLLPFD_PFD0_VALID_MASK << (uint32_t)(pfdClkout)))
70 #define SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout) \ argument
71 ((uint32_t)((uint32_t)SCG_APLLPFD_PFD0_CLKGATE_MASK << (uint32_t)(pfdClkout)))
794 scg_spll_pfd_clkout_t pfdClkout; /*!< PLL PFD clouk out select. */ member
858 scg_apll_pfd_clkout_t pfdClkout; /*!< SCG auxiliary PLL PFD clouk out select. */ member
1641 uint32_t CLOCK_GetAuxPllPfdFreq(scg_apll_pfd_clkout_t pfdClkout);
1672 void CLOCK_EnableAuxPllPfdClkout(scg_apll_pfd_clkout_t pfdClkout, uint8_t fracValue);
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.c1125 SCG_APLLCFG_PFDSEL(((uint32_t)config->pfdClkout) >> 3U) | in CLOCK_InitAuxPll()
1213 scg_apll_pfd_clkout_t pfdClkout; in CLOCK_GetAuxPllFreq() local
1218 pfdClkout = (scg_apll_pfd_clkout_t)(uint32_t)( in CLOCK_GetAuxPllFreq()
1220 freq = CLOCK_GetAuxPllPfdFreq(pfdClkout); in CLOCK_GetAuxPllFreq()
1294 uint32_t CLOCK_GetAuxPllPfdFreq(scg_apll_pfd_clkout_t pfdClkout) in CLOCK_GetAuxPllPfdFreq() argument
1299 …if ((SCG->APLLPFD & SCG_PLLPFD_PFD_VALID_MASK(pfdClkout)) != 0UL) /* Auxiliary PLL PFD is valid. */ in CLOCK_GetAuxPllPfdFreq()
1301 if (0UL == (SCG->APLLPFD & SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout))) in CLOCK_GetAuxPllPfdFreq()
1303 fracValue = (SCG->APLLPFD & SCG_PLLPFD_PFD_MASK(pfdClkout)) >> (uint32_t)pfdClkout; in CLOCK_GetAuxPllPfdFreq()
1357 void CLOCK_EnableAuxPllPfdClkout(scg_apll_pfd_clkout_t pfdClkout, uint8_t fracValue) in CLOCK_EnableAuxPllPfdClkout() argument
1367 SCG->APLLPFD &= ~SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout); in CLOCK_EnableAuxPllPfdClkout()
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Dfsl_clock.h57 #define SCG_PLLPFD_PFD_VAL(pfdClkout, fracValue) ((uint32_t)((uint32_t)(fracValue) << (uint32_t)(pf… argument
61 #define SCG_PLLPFD_PFD_MASK(pfdClkout) ((uint32_t)((uint32_t)(SCG_APLLPFD_PFD0_MASK) << (uint32_t)( argument
65 #define SCG_PLLPFD_PFD_VALID_MASK(pfdClkout) \ argument
66 ((uint32_t)((uint32_t)SCG_APLLPFD_PFD0_VALID_MASK << (uint32_t)(pfdClkout)))
70 #define SCG_PLLPFD_PFD_CLKGATE_MASK(pfdClkout) \ argument
71 ((uint32_t)((uint32_t)SCG_APLLPFD_PFD0_CLKGATE_MASK << (uint32_t)(pfdClkout)))
794 scg_spll_pfd_clkout_t pfdClkout; /*!< PLL PFD clouk out select. */ member
858 scg_apll_pfd_clkout_t pfdClkout; /*!< SCG auxiliary PLL PFD clouk out select. */ member
1641 uint32_t CLOCK_GetAuxPllPfdFreq(scg_apll_pfd_clkout_t pfdClkout);
1672 void CLOCK_EnableAuxPllPfdClkout(scg_apll_pfd_clkout_t pfdClkout, uint8_t fracValue);
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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c82 .pfdClkout = kSCG_SysPllPfd0Clk,
99 .pfdClkout = kSCG_AuxPllPfd0Clk,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c82 .pfdClkout = kSCG_SysPllPfd0Clk,
99 .pfdClkout = kSCG_AuxPllPfd0Clk,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c82 .pfdClkout = kSCG_SysPllPfd0Clk,
99 .pfdClkout = kSCG_AuxPllPfd0Clk,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c72 .pfdClkout = kSCG_SysPllPfd0Clk,
89 .pfdClkout = kSCG_AuxPllPfd0Clk,