Searched refs:mclkOutputEnable (Results 1 – 2 of 2) sorted by relevance
193 … bool mclkOutputEnable; /*!< Master clock output enable, true means master clock divider enabled */ member305 bool mclkOutputEnable; /*!< master clock output enable */ member
422 base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable)); in SAI_TxInit()546 base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable)); in SAI_RxInit()705 config->mclkOutputEnable = true; in SAI_TxGetDefaultConfig()739 config->mclkOutputEnable = true; in SAI_RxGetDefaultConfig()1206 base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable)); in SAI_SetMasterClockConfig()1212 if (config->mclkOutputEnable) in SAI_SetMasterClockConfig()