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Searched refs:mcg_c5 (Results 1 – 25 of 25) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.c762 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
764 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
765 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW22D5/drivers/
Dfsl_clock.c815 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
817 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
818 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW24D5/drivers/
Dfsl_clock.c815 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
817 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
818 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV56F24/drivers/
Dfsl_clock.c947 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
949 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
950 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV58F24/drivers/
Dfsl_clock.c947 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
949 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
950 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F51212/drivers/
Dfsl_clock.c1004 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1006 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1007 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F25612/drivers/
Dfsl_clock.c989 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
991 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
992 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F25612/drivers/
Dfsl_clock.c1040 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1042 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1043 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK24F12/drivers/
Dfsl_clock.c1009 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1011 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1012 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12/drivers/
Dfsl_clock.c1002 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1004 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1005 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/drivers/
Dfsl_clock.c1061 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1063 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1064 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.c1061 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1063 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1064 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F51212/drivers/
Dfsl_clock.c1052 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1054 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1055 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK64F12/drivers/
Dfsl_clock.c1019 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1021 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1022 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK63F12/drivers/
Dfsl_clock.c1008 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1010 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1011 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM33ZA5/drivers/
Dfsl_clock.c1201 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1204 mcg_c5 |= MCG_C5_PLLREFSEL0(config->refSrc); in CLOCK_EnablePll0()
1207 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1209 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM14ZA5/drivers/
Dfsl_clock.c1201 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1204 mcg_c5 |= MCG_C5_PLLREFSEL0(config->refSrc); in CLOCK_EnablePll0()
1207 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1209 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/drivers/
Dfsl_clock.c1280 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1282 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1283 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.c1239 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1241 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1242 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.c1279 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1281 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1282 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.c1280 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1282 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1283 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.c1239 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
1241 mcg_c5 |= MCG_C5_PRDIV0(config->prdiv); in CLOCK_EnablePll0()
1242 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34Z7/drivers/
Dfsl_clock.c869 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
871 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM35Z7/drivers/
Dfsl_clock.c897 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
899 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34ZA5/drivers/
Dfsl_clock.c859 uint8_t mcg_c5 = 0U; in CLOCK_EnablePll0() local
861 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()