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Searched refs:kSRAM3_RST_SHIFT_RSTn (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_reset.h79 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_reset.h78 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_reset.h79 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_reset.h78 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_reset.h79 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_reset.h78 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_reset.h79 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_reset.h79 kSRAM3_RST_SHIFT_RSTn = 131072 | 6U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_reset.h43 kSRAM3_RST_SHIFT_RSTn = 0 | 5U, /**< SRAM3 reset control */ enumerator