1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_PINT_H_
10 #define _FSL_PINT_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup pint_driver
16 * @{
17 */
18
19 /*! @file */
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 /*! @name Driver version */
26 /*@{*/
27 #define FSL_PINT_DRIVER_VERSION (MAKE_VERSION(2, 1, 11))
28 /*@}*/
29
30 /* Number of interrupt line supported by PINT */
31 #define PINT_PIN_INT_COUNT 8U
32
33 /* Number of interrupt line supported by SECURE PINT */
34 #define SEC_PINT_PIN_INT_COUNT 2U
35
36 /* Number of input sources supported by PINT */
37 #define PINT_INPUT_COUNT 8U
38
39 /* PININT Bit slice source register bits */
40 #define PININT_BITSLICE_SRC_START 8U
41 #define PININT_BITSLICE_SRC_MASK 7U
42
43 /* PININT Bit slice configuration register bits */
44 #define PININT_BITSLICE_CFG_START 8U
45 #define PININT_BITSLICE_CFG_MASK 7U
46 #define PININT_BITSLICE_ENDP_MASK 7U
47
48 #define PINT_PIN_INT_LEVEL 0x10U
49 #define PINT_PIN_INT_EDGE 0x00U
50 #define PINT_PIN_INT_FALL_OR_HIGH_LEVEL 0x02U
51 #define PINT_PIN_INT_RISE 0x01U
52 #define PINT_PIN_RISE_EDGE (PINT_PIN_INT_EDGE | PINT_PIN_INT_RISE)
53 #define PINT_PIN_FALL_EDGE (PINT_PIN_INT_EDGE | PINT_PIN_INT_FALL_OR_HIGH_LEVEL)
54 #define PINT_PIN_BOTH_EDGE (PINT_PIN_INT_EDGE | PINT_PIN_INT_RISE | PINT_PIN_INT_FALL_OR_HIGH_LEVEL)
55 #define PINT_PIN_LOW_LEVEL (PINT_PIN_INT_LEVEL)
56 #define PINT_PIN_HIGH_LEVEL (PINT_PIN_INT_LEVEL | PINT_PIN_INT_FALL_OR_HIGH_LEVEL)
57
58 /*! @brief PINT Pin Interrupt enable type */
59 typedef enum _pint_pin_enable
60 {
61 kPINT_PinIntEnableNone = 0U, /*!< Do not generate Pin Interrupt */
62 kPINT_PinIntEnableRiseEdge = PINT_PIN_RISE_EDGE, /*!< Generate Pin Interrupt on rising edge */
63 kPINT_PinIntEnableFallEdge = PINT_PIN_FALL_EDGE, /*!< Generate Pin Interrupt on falling edge */
64 kPINT_PinIntEnableBothEdges = PINT_PIN_BOTH_EDGE, /*!< Generate Pin Interrupt on both edges */
65 kPINT_PinIntEnableLowLevel = PINT_PIN_LOW_LEVEL, /*!< Generate Pin Interrupt on low level */
66 kPINT_PinIntEnableHighLevel = PINT_PIN_HIGH_LEVEL /*!< Generate Pin Interrupt on high level */
67 } pint_pin_enable_t;
68
69 /*! @brief PINT Pin Interrupt type */
70 typedef enum _pint_int
71 {
72 kPINT_PinInt0 = 0U, /*!< Pin Interrupt 0 */
73 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
74 kPINT_PinInt1 = 1U, /*!< Pin Interrupt 1 */
75 #endif
76 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 2U)
77 kPINT_PinInt2 = 2U, /*!< Pin Interrupt 2 */
78 #endif
79 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 3U)
80 kPINT_PinInt3 = 3U, /*!< Pin Interrupt 3 */
81 #endif
82 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 4U)
83 kPINT_PinInt4 = 4U, /*!< Pin Interrupt 4 */
84 #endif
85 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 5U)
86 kPINT_PinInt5 = 5U, /*!< Pin Interrupt 5 */
87 #endif
88 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 6U)
89 kPINT_PinInt6 = 6U, /*!< Pin Interrupt 6 */
90 #endif
91 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 7U)
92 kPINT_PinInt7 = 7U, /*!< Pin Interrupt 7 */
93 #endif
94 #if defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS > 0U)
95 kPINT_SecPinInt0 = 0U, /*!< Secure Pin Interrupt 0 */
96 #endif
97 #if defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
98 kPINT_SecPinInt1 = 1U, /*!< Secure Pin Interrupt 1 */
99 #endif
100 } pint_pin_int_t;
101
102 /*! @brief PINT Pattern Match bit slice input source type */
103 typedef enum _pint_pmatch_input_src
104 {
105 kPINT_PatternMatchInp0Src = 0U, /*!< Input source 0 */
106 kPINT_PatternMatchInp1Src = 1U, /*!< Input source 1 */
107 kPINT_PatternMatchInp2Src = 2U, /*!< Input source 2 */
108 kPINT_PatternMatchInp3Src = 3U, /*!< Input source 3 */
109 kPINT_PatternMatchInp4Src = 4U, /*!< Input source 4 */
110 kPINT_PatternMatchInp5Src = 5U, /*!< Input source 5 */
111 kPINT_PatternMatchInp6Src = 6U, /*!< Input source 6 */
112 kPINT_PatternMatchInp7Src = 7U, /*!< Input source 7 */
113 kPINT_SecPatternMatchInp0Src = 0U, /*!< Input source 0 */
114 kPINT_SecPatternMatchInp1Src = 1U, /*!< Input source 1 */
115 } pint_pmatch_input_src_t;
116
117 /*! @brief PINT Pattern Match bit slice type */
118 typedef enum _pint_pmatch_bslice
119 {
120 kPINT_PatternMatchBSlice0 = 0U, /*!< Bit slice 0 */
121 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
122 kPINT_PatternMatchBSlice1 = 1U, /*!< Bit slice 1 */
123 #endif
124 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 2U)
125 kPINT_PatternMatchBSlice2 = 2U, /*!< Bit slice 2 */
126 #endif
127 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 3U)
128 kPINT_PatternMatchBSlice3 = 3U, /*!< Bit slice 3 */
129 #endif
130 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 4U)
131 kPINT_PatternMatchBSlice4 = 4U, /*!< Bit slice 4 */
132 #endif
133 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 5U)
134 kPINT_PatternMatchBSlice5 = 5U, /*!< Bit slice 5 */
135 #endif
136 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 6U)
137 kPINT_PatternMatchBSlice6 = 6U, /*!< Bit slice 6 */
138 #endif
139 #if defined(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 7U)
140 kPINT_PatternMatchBSlice7 = 7U, /*!< Bit slice 7 */
141 #endif
142 #if defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS > 0U)
143 kPINT_SecPatternMatchBSlice0 = 0U, /*!< Bit slice 0 */
144 #endif
145 #if defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && (FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
146 kPINT_SecPatternMatchBSlice1 = 1U, /*!< Bit slice 1 */
147 #endif
148 } pint_pmatch_bslice_t;
149
150 /*! @brief PINT Pattern Match configuration type */
151 typedef enum _pint_pmatch_bslice_cfg
152 {
153 kPINT_PatternMatchAlways = 0U, /*!< Always Contributes to product term match */
154 kPINT_PatternMatchStickyRise = 1U, /*!< Sticky Rising edge */
155 kPINT_PatternMatchStickyFall = 2U, /*!< Sticky Falling edge */
156 kPINT_PatternMatchStickyBothEdges = 3U, /*!< Sticky Rising or Falling edge */
157 kPINT_PatternMatchHigh = 4U, /*!< High level */
158 kPINT_PatternMatchLow = 5U, /*!< Low level */
159 kPINT_PatternMatchNever = 6U, /*!< Never contributes to product term match */
160 kPINT_PatternMatchBothEdges = 7U, /*!< Either rising or falling edge */
161 } pint_pmatch_bslice_cfg_t;
162
163 /*! @brief PINT Callback function. */
164 typedef void (*pint_cb_t)(pint_pin_int_t pintr, uint32_t pmatch_status);
165
166 typedef struct _pint_pmatch_cfg
167 {
168 pint_pmatch_input_src_t bs_src;
169 pint_pmatch_bslice_cfg_t bs_cfg;
170 bool end_point;
171 pint_cb_t callback;
172 } pint_pmatch_cfg_t;
173
174 /*******************************************************************************
175 * API
176 ******************************************************************************/
177
178 #if defined(__cplusplus)
179 extern "C" {
180 #endif
181
182 /*!
183 * @brief Initialize PINT peripheral.
184
185 * This function initializes the PINT peripheral and enables the clock.
186 *
187 * @param base Base address of the PINT peripheral.
188 *
189 * @retval None.
190 */
191 void PINT_Init(PINT_Type *base);
192
193 /*!
194 * @brief Configure PINT peripheral pin interrupt.
195
196 * This function configures a given pin interrupt.
197 *
198 * @param base Base address of the PINT peripheral.
199 * @param intr Pin interrupt.
200 * @param enable Selects detection logic.
201 * @param callback Callback.
202 *
203 * @retval None.
204 */
205 void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable, pint_cb_t callback);
206
207 /*!
208 * @brief Get PINT peripheral pin interrupt configuration.
209
210 * This function returns the configuration of a given pin interrupt.
211 *
212 * @param base Base address of the PINT peripheral.
213 * @param pintr Pin interrupt.
214 * @param enable Pointer to store the detection logic.
215 * @param callback Callback.
216 *
217 * @retval None.
218 */
219 void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable, pint_cb_t *callback);
220
221 /*!
222 * @brief Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.
223
224 * This function clears the selected pin interrupt status.
225 *
226 * @param base Base address of the PINT peripheral.
227 * @param pintr Pin interrupt.
228 *
229 * @retval None.
230 */
231 void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr);
232
233 /*!
234 * @brief Get Selected pin interrupt status.
235
236 * This function returns the selected pin interrupt status.
237 *
238 * @param base Base address of the PINT peripheral.
239 * @param pintr Pin interrupt.
240 *
241 * @retval status = 0 No pin interrupt request. = 1 Selected Pin interrupt request active.
242 */
PINT_PinInterruptGetStatus(PINT_Type * base,pint_pin_int_t pintr)243 static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)
244 {
245 return ((base->IST & (1UL << (uint32_t)pintr)) != 0U ? 1U : 0U);
246 }
247
248 /*!
249 * @brief Clear all pin interrupts status only when pins were triggered by edge-sensitive.
250
251 * This function clears the status of all pin interrupts.
252 *
253 * @param base Base address of the PINT peripheral.
254 *
255 * @retval None.
256 */
257 void PINT_PinInterruptClrStatusAll(PINT_Type *base);
258
259 /*!
260 * @brief Get all pin interrupts status.
261
262 * This function returns the status of all pin interrupts.
263 *
264 * @param base Base address of the PINT peripheral.
265 *
266 * @retval status Each bit position indicates the status of corresponding pin interrupt.
267 * = 0 No pin interrupt request. = 1 Pin interrupt request active.
268 */
PINT_PinInterruptGetStatusAll(PINT_Type * base)269 static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)
270 {
271 return (base->IST);
272 }
273
274 /*!
275 * @brief Clear Selected pin interrupt fall flag.
276
277 * This function clears the selected pin interrupt fall flag.
278 *
279 * @param base Base address of the PINT peripheral.
280 * @param pintr Pin interrupt.
281 *
282 * @retval None.
283 */
PINT_PinInterruptClrFallFlag(PINT_Type * base,pint_pin_int_t pintr)284 static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)
285 {
286 base->FALL = (1UL << (uint32_t)pintr);
287 }
288
289 /*!
290 * @brief Get selected pin interrupt fall flag.
291
292 * This function returns the selected pin interrupt fall flag.
293 *
294 * @param base Base address of the PINT peripheral.
295 * @param pintr Pin interrupt.
296 *
297 * @retval flag = 0 Falling edge has not been detected. = 1 Falling edge has been detected.
298 */
PINT_PinInterruptGetFallFlag(PINT_Type * base,pint_pin_int_t pintr)299 static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)
300 {
301 return ((base->FALL & (1UL << (uint32_t)pintr)) != 0U ? 1U : 0U);
302 }
303
304 /*!
305 * @brief Clear all pin interrupt fall flags.
306
307 * This function clears the fall flag for all pin interrupts.
308 *
309 * @param base Base address of the PINT peripheral.
310 *
311 * @retval None.
312 */
PINT_PinInterruptClrFallFlagAll(PINT_Type * base)313 static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)
314 {
315 base->FALL = PINT_FALL_FDET_MASK;
316 }
317
318 /*!
319 * @brief Get all pin interrupt fall flags.
320
321 * This function returns the fall flag of all pin interrupts.
322 *
323 * @param base Base address of the PINT peripheral.
324 *
325 * @retval flags Each bit position indicates the falling edge detection of the corresponding pin interrupt.
326 * 0 Falling edge has not been detected. = 1 Falling edge has been detected.
327 */
PINT_PinInterruptGetFallFlagAll(PINT_Type * base)328 static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)
329 {
330 return (base->FALL);
331 }
332
333 /*!
334 * @brief Clear Selected pin interrupt rise flag.
335
336 * This function clears the selected pin interrupt rise flag.
337 *
338 * @param base Base address of the PINT peripheral.
339 * @param pintr Pin interrupt.
340 *
341 * @retval None.
342 */
PINT_PinInterruptClrRiseFlag(PINT_Type * base,pint_pin_int_t pintr)343 static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)
344 {
345 base->RISE = (1UL << (uint32_t)pintr);
346 }
347
348 /*!
349 * @brief Get selected pin interrupt rise flag.
350
351 * This function returns the selected pin interrupt rise flag.
352 *
353 * @param base Base address of the PINT peripheral.
354 * @param pintr Pin interrupt.
355 *
356 * @retval flag = 0 Rising edge has not been detected. = 1 Rising edge has been detected.
357 */
PINT_PinInterruptGetRiseFlag(PINT_Type * base,pint_pin_int_t pintr)358 static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)
359 {
360 return ((base->RISE & (1UL << (uint32_t)pintr)) != 0U ? 1U : 0U);
361 }
362
363 /*!
364 * @brief Clear all pin interrupt rise flags.
365
366 * This function clears the rise flag for all pin interrupts.
367 *
368 * @param base Base address of the PINT peripheral.
369 *
370 * @retval None.
371 */
PINT_PinInterruptClrRiseFlagAll(PINT_Type * base)372 static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)
373 {
374 base->RISE = PINT_RISE_RDET_MASK;
375 }
376
377 /*!
378 * @brief Get all pin interrupt rise flags.
379
380 * This function returns the rise flag of all pin interrupts.
381 *
382 * @param base Base address of the PINT peripheral.
383 *
384 * @retval flags Each bit position indicates the rising edge detection of the corresponding pin interrupt.
385 * 0 Rising edge has not been detected. = 1 Rising edge has been detected.
386 */
PINT_PinInterruptGetRiseFlagAll(PINT_Type * base)387 static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)
388 {
389 return (base->RISE);
390 }
391
392 /*!
393 * @brief Configure PINT pattern match.
394
395 * This function configures a given pattern match bit slice.
396 *
397 * @param base Base address of the PINT peripheral.
398 * @param bslice Pattern match bit slice number.
399 * @param cfg Pointer to bit slice configuration.
400 *
401 * @retval None.
402 */
403 void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg);
404
405 /*!
406 * @brief Get PINT pattern match configuration.
407
408 * This function returns the configuration of a given pattern match bit slice.
409 *
410 * @param base Base address of the PINT peripheral.
411 * @param bslice Pattern match bit slice number.
412 * @param cfg Pointer to bit slice configuration.
413 *
414 * @retval None.
415 */
416 void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg);
417
418 /*!
419 * @brief Get pattern match bit slice status.
420
421 * This function returns the status of selected bit slice.
422 *
423 * @param base Base address of the PINT peripheral.
424 * @param bslice Pattern match bit slice number.
425 *
426 * @retval status = 0 Match has not been detected. = 1 Match has been detected.
427 */
PINT_PatternMatchGetStatus(PINT_Type * base,pint_pmatch_bslice_t bslice)428 static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)
429 {
430 return ((base->PMCTRL >> PINT_PMCTRL_PMAT_SHIFT) & (1UL << (uint32_t)bslice)) >> (uint32_t)bslice;
431 }
432
433 /*!
434 * @brief Get status of all pattern match bit slices.
435
436 * This function returns the status of all bit slices.
437 *
438 * @param base Base address of the PINT peripheral.
439 *
440 * @retval status Each bit position indicates the match status of corresponding bit slice.
441 * = 0 Match has not been detected. = 1 Match has been detected.
442 */
PINT_PatternMatchGetStatusAll(PINT_Type * base)443 static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)
444 {
445 return base->PMCTRL >> PINT_PMCTRL_PMAT_SHIFT;
446 }
447
448 /*!
449 * @brief Reset pattern match detection logic.
450
451 * This function resets the pattern match detection logic if any of the product term is matching.
452 *
453 * @param base Base address of the PINT peripheral.
454 *
455 * @retval pmstatus Each bit position indicates the match status of corresponding bit slice.
456 * = 0 Match was detected. = 1 Match was not detected.
457 */
458 uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base);
459
460 /*!
461 * @brief Enable pattern match function.
462
463 * This function enables the pattern match function.
464 *
465 * @param base Base address of the PINT peripheral.
466 *
467 * @retval None.
468 */
PINT_PatternMatchEnable(PINT_Type * base)469 static inline void PINT_PatternMatchEnable(PINT_Type *base)
470 {
471 base->PMCTRL = (base->PMCTRL & PINT_PMCTRL_ENA_RXEV_MASK) | PINT_PMCTRL_SEL_PMATCH_MASK;
472 }
473
474 /*!
475 * @brief Disable pattern match function.
476
477 * This function disables the pattern match function.
478 *
479 * @param base Base address of the PINT peripheral.
480 *
481 * @retval None.
482 */
PINT_PatternMatchDisable(PINT_Type * base)483 static inline void PINT_PatternMatchDisable(PINT_Type *base)
484 {
485 base->PMCTRL = (base->PMCTRL & PINT_PMCTRL_ENA_RXEV_MASK) & ~PINT_PMCTRL_SEL_PMATCH_MASK;
486 }
487
488 /*!
489 * @brief Enable RXEV output.
490
491 * This function enables the pattern match RXEV output.
492 *
493 * @param base Base address of the PINT peripheral.
494 *
495 * @retval None.
496 */
PINT_PatternMatchEnableRXEV(PINT_Type * base)497 static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)
498 {
499 base->PMCTRL = (base->PMCTRL & PINT_PMCTRL_SEL_PMATCH_MASK) | PINT_PMCTRL_ENA_RXEV_MASK;
500 }
501
502 /*!
503 * @brief Disable RXEV output.
504
505 * This function disables the pattern match RXEV output.
506 *
507 * @param base Base address of the PINT peripheral.
508 *
509 * @retval None.
510 */
PINT_PatternMatchDisableRXEV(PINT_Type * base)511 static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)
512 {
513 base->PMCTRL = (base->PMCTRL & PINT_PMCTRL_SEL_PMATCH_MASK) & ~PINT_PMCTRL_ENA_RXEV_MASK;
514 }
515
516 /*!
517 * @brief Enable callback.
518
519 * This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored
520 * as soon as they are enabled, the callback function is not enabled until this function is called.
521 *
522 * @param base Base address of the PINT peripheral.
523 *
524 * @retval None.
525 */
526 void PINT_EnableCallback(PINT_Type *base);
527
528 /*!
529 * @brief Disable callback.
530
531 * This function disables the interrupt for the selected PINT peripheral. Although the pins are still
532 * being monitored but the callback function is not called.
533 *
534 * @param base Base address of the peripheral.
535 *
536 * @retval None.
537 */
538 void PINT_DisableCallback(PINT_Type *base);
539
540 /*!
541 * @brief Deinitialize PINT peripheral.
542
543 * This function disables the PINT clock.
544 *
545 * @param base Base address of the PINT peripheral.
546 *
547 * @retval None.
548 */
549 void PINT_Deinit(PINT_Type *base);
550
551 /*!
552 * @brief enable callback by pin index.
553
554 * This function enables callback by pin index instead of enabling all pins.
555 *
556 * @param base Base address of the peripheral.
557 * @param pintIdx pin index.
558 *
559 * @retval None.
560 */
561 void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx);
562
563 /*!
564 * @brief disable callback by pin index.
565
566 * This function disables callback by pin index instead of disabling all pins.
567 *
568 * @param base Base address of the peripheral.
569 * @param pintIdx pin index.
570 *
571 * @retval None.
572 */
573 void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx);
574
575 #ifdef __cplusplus
576 }
577 #endif
578
579 /*@}*/
580
581 #endif /* _FSL_PINT_H_ */
582
