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Searched refs:clockDiv (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/imx/drivers/
Di2c_imx.c103 uint32_t clockDiv; in I2C_SetBaudRate() local
109 clockDiv = clockRate / baudRate; in I2C_SetBaudRate()
111 if (clockDiv < i2cClkDivTab[0][0]) in I2C_SetBaudRate()
116 else if (clockDiv > i2cClkDivTab[sizeof(i2cClkDivTab)/sizeof(i2cClkDivTab[0]) - 1][0]) in I2C_SetBaudRate()
123 while (i2cClkDivTab[clkDivIndex][0] < clockDiv) in I2C_SetBaudRate()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/eeprom/
Dfsl_eeprom.c109 uint32_t clockDiv = 0; in EEPROM_Init() local
133 clockDiv = sourceClock_Hz / (uint32_t)FSL_FEATURE_EEPROM_INTERNAL_FREQ; in EEPROM_Init()
137 clockDiv += 1UL; in EEPROM_Init()
140 if (sourceClock_Hz / clockDiv > (uint32_t)FSL_FEATURE_EEPROM_INTERNAL_FREQ) in EEPROM_Init()
142 clockDiv += 1UL; in EEPROM_Init()
145 base->CLKDIV = clockDiv - 1UL; in EEPROM_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/codec/wm8962/
Dfsl_wm8962.c310 uint16_t clockDiv = 0U; in WM8962_Init() local
347 WM8962_CHECK_RET(WM8962_GetClockDivider(mclk, WM8962_MAX_DSP_CLOCK, &clockDiv), ret); in WM8962_Init()
348 …WM8962_CHECK_RET(WM8962_ModifyReg(handle, WM8962_CLOCK1, 3U << 9U, (uint16_t)(clockDiv << 9U)), re… in WM8962_Init()
351 …WM8962_CHECK_RET(WM8962_SetMasterClock(handle, mclk / (uint32_t)(1UL << clockDiv), config->format.… in WM8962_Init()
361 WM8962_CHECK_RET(WM8962_ReadReg(handle, WM8962_CLOCK1, &clockDiv), ret); in WM8962_Init()
362 sysClk = mclk / (1UL << (clockDiv & 3U)); in WM8962_Init()