1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
7  *
8  * o Redistributions of source code must retain the above copyright notice, this list
9  *   of conditions and the following disclaimer.
10  *
11  * o Redistributions in binary form must reproduce the above copyright notice, this
12  *   list of conditions and the following disclaimer in the documentation and/or
13  *   other materials provided with the distribution.
14  *
15  * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16  *   contributors may be used to endorse or promote products derived from this
17  *   software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __CCM_ANALOG_IMX7D_H__
32 #define __CCM_ANALOG_IMX7D_H__
33 
34 #include <stdint.h>
35 #include <stdbool.h>
36 #include <stddef.h>
37 #include <assert.h>
38 #include "device_imx.h"
39 
40 /*!
41  * @addtogroup ccm_analog_driver
42  * @{
43  */
44 
45 /*******************************************************************************
46  * Definitions
47  ******************************************************************************/
48 #define CCM_ANALOG_TUPLE(reg, shift)               ((offsetof(CCM_ANALOG_Type, reg) & 0xFFFF) | ((shift) << 16))
49 #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) (*((volatile uint32_t *)((uint32_t)base + ((tuple) & 0xFFFF) + off)))
50 #define CCM_ANALOG_TUPLE_REG(base, tuple)          CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0)
51 #define CCM_ANALOG_TUPLE_REG_SET(base, tuple)      CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 4)
52 #define CCM_ANALOG_TUPLE_REG_CLR(base, tuple)      CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 8)
53 #define CCM_ANALOG_TUPLE_SHIFT(tuple)              (((tuple) >> 16) & 0x1F)
54 
55 /*!
56  * @brief PLL control names for PLL power/bypass/lock operations.
57  *
58  * These constants define the PLL control names for PLL power/bypass/lock operations.\n
59  * - 0:15: REG offset to CCM_ANALOG_BASE in bytes.
60  * - 16:20: Power down bit shift.
61  */
62 enum _ccm_analog_pll_control
63 {
64     ccmAnalogPllArmControl   = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT),     /*!< CCM Analog ARM PLL Control.*/
65     ccmAnalogPllDdrControl   = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_POWERDOWN_SHIFT),     /*!< CCM Analog DDR PLL Control.*/
66     ccmAnalogPll480Control   = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_POWERDOWN_SHIFT),     /*!< CCM Analog 480M PLL Control.*/
67     ccmAnalogPllEnetControl  = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT),   /*!< CCM Analog Ethernet PLL Control.*/
68     ccmAnalogPllAudioControl = CCM_ANALOG_TUPLE(PLL_AUDIO, CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT), /*!< CCM Analog AUDIO PLL Control.*/
69     ccmAnalogPllVideoControl = CCM_ANALOG_TUPLE(PLL_VIDEO, CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT), /*!< CCM Analog VIDEO PLL Control.*/
70 };
71 
72 /*!
73  * @brief PLL clock names for clock enable/disable settings.
74  *
75  * These constants define the PLL clock names for PLL clock enable/disable operations.\n
76  * - 0:15: REG offset to CCM_ANALOG_BASE in bytes.
77  * - 16:20: Clock enable bit shift.
78  */
79 enum _ccm_analog_pll_clock
80 {
81     ccmAnalogPllArmClock        = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_ENABLE_CLK_SHIFT),          /*!< CCM Analog ARM PLL Clock.*/
82     ccmAnalogPllDdrClock        = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_ENABLE_CLK_SHIFT),          /*!< CCM Analog DDR PLL Clock.*/
83     ccmAnalogPllDdrDiv2Clock    = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_SHIFT),     /*!< CCM Analog DDR PLL divided by 2 Clock.*/
84     ccmAnalogPll480Clock        = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_ENABLE_CLK_SHIFT),          /*!< CCM Analog 480M PLL Clock.*/
85     ccmAnalogPllEnet25MhzClock  = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_25MHZ_SHIFT),  /*!< CCM Analog Ethernet 25M PLL Clock.*/
86     ccmAnalogPllEnet40MhzClock  = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_40MHZ_SHIFT),  /*!< CCM Analog Ethernet 40M PLL Clock.*/
87     ccmAnalogPllEnet50MhzClock  = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_50MHZ_SHIFT),  /*!< CCM Analog Ethernet 50M PLL Clock.*/
88     ccmAnalogPllEnet100MhzClock = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_100MHZ_SHIFT), /*!< CCM Analog Ethernet 100M PLL Clock.*/
89     ccmAnalogPllEnet125MhzClock = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_125MHZ_SHIFT), /*!< CCM Analog Ethernet 125M PLL Clock.*/
90     ccmAnalogPllEnet250MhzClock = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_250MHZ_SHIFT), /*!< CCM Analog Ethernet 250M PLL Clock.*/
91     ccmAnalogPllEnet500MhzClock = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_ENABLE_CLK_500MHZ_SHIFT), /*!< CCM Analog Ethernet 500M PLL Clock.*/
92     ccmAnalogPllAudioClock      = CCM_ANALOG_TUPLE(PLL_AUDIO, CCM_ANALOG_PLL_AUDIO_ENABLE_CLK_SHIFT),      /*!< CCM Analog AUDIO PLL Clock.*/
93     ccmAnalogPllVideoClock      = CCM_ANALOG_TUPLE(PLL_VIDEO, CCM_ANALOG_PLL_VIDEO_ENABLE_CLK_SHIFT),      /*!< CCM Analog VIDEO PLL Clock.*/
94 };
95 
96 /*!
97  * @brief PFD gate names for clock gate settings, clock source is system PLL(PLL_480)
98  *
99  * These constants define the PFD gate names for PFD clock enable/disable operations.\n
100  * - 0:15: REG offset to CCM_ANALOG_BASE in bytes.
101  * - 16:20: Clock gate bit shift.
102  */
103 enum _ccm_analog_pfd_clkgate
104 {
105     ccmAnalogMainDiv1ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_MAIN_DIV1_CLKGATE_SHIFT),   /*!< CCM Analog 480 MAIN DIV1 Clock Gate.*/
106     ccmAnalogMainDiv2ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_MAIN_DIV2_CLKGATE_SHIFT),   /*!< CCM Analog 480 MAIN DIV2 Clock Gate.*/
107     ccmAnalogMainDiv4ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_MAIN_DIV4_CLKGATE_SHIFT),   /*!< CCM Analog 480 MAIN DIV4 Clock Gate.*/
108     ccmAnalogPfd0Div2ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_PFD0_DIV2_CLKGATE_SHIFT),   /*!< CCM Analog 480 PFD0 DIV2 Clock Gate.*/
109     ccmAnalogPfd1Div2ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_PFD1_DIV2_CLKGATE_SHIFT),   /*!< CCM Analog 480 PFD1 DIV2 Clock Gate.*/
110     ccmAnalogPfd2Div2ClkGate = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_PFD2_DIV2_CLKGATE_SHIFT),   /*!< CCM Analog 480 PFD2 DIV2 Clock Gate.*/
111     ccmAnalogPfd0Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD0_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480A PFD0 DIV1 Clock Gate.*/
112     ccmAnalogPfd1Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD1_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480A PFD1 DIV1 Clock Gate.*/
113     ccmAnalogPfd2Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD2_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480A PFD2 DIV1 Clock Gate.*/
114     ccmAnalogPfd3Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD3_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480A PFD3 DIV1 Clock Gate.*/
115     ccmAnalogPfd4Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD4_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480B PFD4 DIV1 Clock Gate.*/
116     ccmAnalogPfd5Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD5_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480B PFD5 DIV1 Clock Gate.*/
117     ccmAnalogPfd6Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD6_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480B PFD6 DIV1 Clock Gate.*/
118     ccmAnalogPfd7Div1ClkGate = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD7_DIV1_CLKGATE_SHIFT), /*!< CCM Analog 480B PFD7 DIV1 Clock Gate.*/
119 };
120 
121 /*!
122  * @brief PFD fraction names for clock fractional divider operations
123  *
124  * These constants define the PFD fraction names for PFD fractional divider operations.\n
125  * - 0:15: REG offset to CCM_ANALOG_BASE in bytes.
126  * - 16:20: Fraction bits shift.
127  */
128 enum _ccm_analog_pfd_frac
129 {
130     ccmAnalogPfd0Frac = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD0_FRAC_SHIFT), /*!< CCM Analog 480A PFD0 fractional divider.*/
131     ccmAnalogPfd1Frac = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD1_FRAC_SHIFT), /*!< CCM Analog 480A PFD1 fractional divider.*/
132     ccmAnalogPfd2Frac = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD2_FRAC_SHIFT), /*!< CCM Analog 480A PFD2 fractional divider.*/
133     ccmAnalogPfd3Frac = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD3_FRAC_SHIFT), /*!< CCM Analog 480A PFD3 fractional divider.*/
134     ccmAnalogPfd4Frac = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD4_FRAC_SHIFT), /*!< CCM Analog 480B PFD4 fractional divider.*/
135     ccmAnalogPfd5Frac = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD5_FRAC_SHIFT), /*!< CCM Analog 480B PFD5 fractional divider.*/
136     ccmAnalogPfd6Frac = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD6_FRAC_SHIFT), /*!< CCM Analog 480B PFD6 fractional divider.*/
137     ccmAnalogPfd7Frac = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD7_FRAC_SHIFT), /*!< CCM Analog 480B PFD7 fractional divider.*/
138 };
139 
140 /*!
141  * @brief PFD stable names for clock stable query
142  *
143  * These constants define the PFD stable names for clock stable query.\n
144  * - 0:15: REG offset to CCM_ANALOG_BASE in bytes.
145  * - 16:20: Stable bit shift.
146  */
147 enum _ccm_analog_pfd_stable
148 {
149     ccmAnalogPfd0Stable = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD0_STABLE_SHIFT),  /*!< CCM Analog 480A PFD0 clock stable query.*/
150     ccmAnalogPfd1Stable = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD1_STABLE_SHIFT),  /*!< CCM Analog 480A PFD1 clock stable query.*/
151     ccmAnalogPfd2Stable = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD2_STABLE_SHIFT),  /*!< CCM Analog 480A PFD2 clock stable query.*/
152     ccmAnalogPfd3Stable = CCM_ANALOG_TUPLE(PFD_480A, CCM_ANALOG_PFD_480A_PFD3_STABLE_SHIFT),  /*!< CCM Analog 480A PFD3 clock stable query.*/
153     ccmAnalogPfd4Stable = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD4_STABLE_SHIFT),  /*!< CCM Analog 480B PFD4 clock stable query.*/
154     ccmAnalogPfd5Stable = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD5_STABLE_SHIFT),  /*!< CCM Analog 480B PFD5 clock stable query.*/
155     ccmAnalogPfd6Stable = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD6_STABLE_SHIFT),  /*!< CCM Analog 480B PFD6 clock stable query.*/
156     ccmAnalogPfd7Stable  = CCM_ANALOG_TUPLE(PFD_480B, CCM_ANALOG_PFD_480B_PFD7_STABLE_SHIFT), /*!< CCM Analog 480B PFD7 clock stable query.*/
157 };
158 
159 /*******************************************************************************
160  * API
161  ******************************************************************************/
162 
163 #if defined(__cplusplus)
164 extern "C" {
165 #endif
166 
167 /*!
168  * @name CCM Analog PLL Operatoin Functions
169  * @{
170  */
171 
172 /*!
173  * @brief Power up PLL
174  *
175  * @param base CCM_ANALOG base pointer.
176  * @param pllControl PLL control name (see @ref _ccm_analog_pll_control enumeration)
177  */
CCM_ANALOG_PowerUpPll(CCM_ANALOG_Type * base,uint32_t pllControl)178 static inline void CCM_ANALOG_PowerUpPll(CCM_ANALOG_Type * base, uint32_t pllControl)
179 {
180     CCM_ANALOG_TUPLE_REG_CLR(base, pllControl) = 1 << CCM_ANALOG_TUPLE_SHIFT(pllControl);
181 }
182 
183 /*!
184  * @brief Power down PLL
185  *
186  * @param base CCM_ANALOG base pointer.
187  * @param pllControl PLL control name (see @ref _ccm_analog_pll_control enumeration)
188  */
CCM_ANALOG_PowerDownPll(CCM_ANALOG_Type * base,uint32_t pllControl)189 static inline void CCM_ANALOG_PowerDownPll(CCM_ANALOG_Type * base, uint32_t pllControl)
190 {
191     CCM_ANALOG_TUPLE_REG_SET(base, pllControl) = 1 << CCM_ANALOG_TUPLE_SHIFT(pllControl);
192 }
193 
194 /*!
195  * @brief PLL bypass setting
196  *
197  * @param base CCM_ANALOG base pointer.
198  * @param pllControl PLL control name (see @ref _ccm_analog_pll_control enumeration)
199  * @param bypass Bypass the PLL.
200  *               - true: Bypass the PLL.
201  *               - false: Do not bypass the PLL.
202  */
CCM_ANALOG_SetPllBypass(CCM_ANALOG_Type * base,uint32_t pllControl,bool bypass)203 static inline void CCM_ANALOG_SetPllBypass(CCM_ANALOG_Type * base, uint32_t pllControl, bool bypass)
204 {
205     if (bypass)
206         CCM_ANALOG_TUPLE_REG_SET(base, pllControl) = CCM_ANALOG_PLL_ARM_BYPASS_MASK;
207     else
208         CCM_ANALOG_TUPLE_REG_CLR(base, pllControl) = CCM_ANALOG_PLL_ARM_BYPASS_MASK;
209 }
210 
211 /*!
212  * @brief Check if PLL is bypassed
213  *
214  * @param base CCM_ANALOG base pointer.
215  * @param pllControl PLL control name (see @ref _ccm_analog_pll_control enumeration)
216  * @return PLL bypass status.
217  *         - true: The PLL is bypassed.
218  *         - false: The PLL is not bypassed.
219  */
CCM_ANALOG_IsPllBypassed(CCM_ANALOG_Type * base,uint32_t pllControl)220 static inline bool CCM_ANALOG_IsPllBypassed(CCM_ANALOG_Type * base, uint32_t pllControl)
221 {
222     return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_BYPASS_MASK);
223 }
224 
225 /*!
226  * @brief Check if PLL clock is locked
227  *
228  * @param base CCM_ANALOG base pointer.
229  * @param pllControl PLL control name (see @ref _ccm_analog_pll_control enumeration)
230  * @return PLL lock status.
231  *         - true: The PLL clock is locked.
232  *         - false: The PLL clock is not locked.
233  */
CCM_ANALOG_IsPllLocked(CCM_ANALOG_Type * base,uint32_t pllControl)234 static inline bool CCM_ANALOG_IsPllLocked(CCM_ANALOG_Type * base, uint32_t pllControl)
235 {
236     return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_LOCK_MASK);
237 }
238 
239 /*!
240  * @brief Enable PLL clock
241  *
242  * @param base CCM_ANALOG base pointer.
243  * @param pllClock PLL clock name (see @ref _ccm_analog_pll_clock enumeration)
244  */
CCM_ANALOG_EnablePllClock(CCM_ANALOG_Type * base,uint32_t pllClock)245 static inline void CCM_ANALOG_EnablePllClock(CCM_ANALOG_Type * base, uint32_t pllClock)
246 {
247     CCM_ANALOG_TUPLE_REG_SET(base, pllClock) = 1 << CCM_ANALOG_TUPLE_SHIFT(pllClock);
248 }
249 
250 /*!
251  * @brief Disable PLL clock
252  *
253  * @param base CCM_ANALOG base pointer.
254  * @param pllClock PLL clock name (see @ref _ccm_analog_pll_clock enumeration)
255  */
CCM_ANALOG_DisablePllClock(CCM_ANALOG_Type * base,uint32_t pllClock)256 static inline void CCM_ANALOG_DisablePllClock(CCM_ANALOG_Type * base, uint32_t pllClock)
257 {
258     CCM_ANALOG_TUPLE_REG_CLR(base, pllClock) = 1 << CCM_ANALOG_TUPLE_SHIFT(pllClock);
259 }
260 
261 /*!
262  * @brief Get ARM PLL clock frequency
263  *
264  * @param base CCM_ANALOG base pointer.
265  * @return ARM PLL clock frequency in Hz
266  */
267 uint32_t CCM_ANALOG_GetArmPllFreq(CCM_ANALOG_Type * base);
268 
269 /*!
270  * @brief Get System PLL (PLL_480) clock frequency
271  *
272  * @param base CCM_ANALOG base pointer.
273  * @return System PLL clock frequency in Hz
274  */
275 uint32_t CCM_ANALOG_GetSysPllFreq(CCM_ANALOG_Type * base);
276 
277 /*!
278  * @brief Get DDR PLL clock frequency
279  *
280  * @param base CCM_ANALOG base pointer.
281  * @return DDR PLL clock frequency in Hz
282  */
283 uint32_t CCM_ANALOG_GetDdrPllFreq(CCM_ANALOG_Type * base);
284 
285 /*!
286  * @brief Get ENET PLL clock frequency
287  *
288  * @param base CCM_ANALOG base pointer.
289  * @return ENET PLL clock frequency in Hz
290  */
291 uint32_t CCM_ANALOG_GetEnetPllFreq(CCM_ANALOG_Type * base);
292 
293 /*!
294  * @brief Get Audio PLL clock frequency
295  *
296  * @param base CCM_ANALOG base pointer.
297  * @return Audio PLL clock frequency in Hz
298  */
299 uint32_t CCM_ANALOG_GetAudioPllFreq(CCM_ANALOG_Type * base);
300 
301 /*!
302  * @brief Get Video PLL clock frequency
303  *
304  * @param base CCM_ANALOG base pointer.
305  * @return Video PLL clock frequency in Hz
306  */
307 uint32_t CCM_ANALOG_GetVideoPllFreq(CCM_ANALOG_Type * base);
308 
309 /*@}*/
310 
311 /*!
312  * @name CCM Analog PFD Operatoin Functions
313  * @{
314  */
315 
316 /*!
317  * @brief Enable PFD clock
318  *
319  * @param base CCM_ANALOG base pointer.
320  * @param pfdClkGate PFD clock gate (see @ref _ccm_analog_pfd_clkgate enumeration)
321  */
CCM_ANALOG_EnablePfdClock(CCM_ANALOG_Type * base,uint32_t pfdClkGate)322 static inline void CCM_ANALOG_EnablePfdClock(CCM_ANALOG_Type * base, uint32_t pfdClkGate)
323 {
324     CCM_ANALOG_TUPLE_REG_CLR(base, pfdClkGate) = 1 << CCM_ANALOG_TUPLE_SHIFT(pfdClkGate);
325 }
326 
327 /*!
328  * @brief Disable PFD clock
329  *
330  * @param base CCM_ANALOG base pointer.
331  * @param pfdClkGate PFD clock gate (see @ref _ccm_analog_pfd_clkgate enumeration)
332  */
CCM_ANALOG_DisablePfdClock(CCM_ANALOG_Type * base,uint32_t pfdClkGate)333 static inline void CCM_ANALOG_DisablePfdClock(CCM_ANALOG_Type * base, uint32_t pfdClkGate)
334 {
335     CCM_ANALOG_TUPLE_REG_SET(base, pfdClkGate) = 1 << CCM_ANALOG_TUPLE_SHIFT(pfdClkGate);
336 }
337 
338 /*!
339  * @brief Check if PFD clock is stable
340  *
341  * @param base CCM_ANALOG base pointer.
342  * @param pfdStable PFD stable identifier (see @ref _ccm_analog_pfd_stable enumeration)
343  * @return PFD clock stable status.
344  *         - true: The PFD clock is stable.
345  *         - false: The PFD clock is not stable.
346  */
CCM_ANALOG_IsPfdStable(CCM_ANALOG_Type * base,uint32_t pfdStable)347 static inline bool CCM_ANALOG_IsPfdStable(CCM_ANALOG_Type * base, uint32_t pfdStable)
348 {
349     return (bool)(CCM_ANALOG_TUPLE_REG(base, pfdStable) & (1 << CCM_ANALOG_TUPLE_SHIFT(pfdStable)));
350 }
351 
352 /*!
353  * @brief Set PFD clock fraction
354  *
355  * @param base CCM_ANALOG base pointer.
356  * @param pfdFrac PFD clock fraction (see @ref _ccm_analog_pfd_frac enumeration)
357  * @param value PFD clock fraction value
358  */
CCM_ANALOG_SetPfdFrac(CCM_ANALOG_Type * base,uint32_t pfdFrac,uint32_t value)359 static inline void CCM_ANALOG_SetPfdFrac(CCM_ANALOG_Type * base, uint32_t pfdFrac, uint32_t value)
360 {
361     assert(value >= 12 && value <= 35);
362     CCM_ANALOG_TUPLE_REG_CLR(base, pfdFrac) = CCM_ANALOG_PFD_480A_CLR_PFD0_FRAC_MASK << CCM_ANALOG_TUPLE_SHIFT(pfdFrac);
363     CCM_ANALOG_TUPLE_REG_SET(base, pfdFrac) = value << CCM_ANALOG_TUPLE_SHIFT(pfdFrac);
364 }
365 
366 /*!
367  * @brief Get PFD clock fraction
368  *
369  * @param base CCM_ANALOG base pointer.
370  * @param pfdFrac PFD clock fraction (see @ref _ccm_analog_pfd_frac enumeration)
371  * @return PFD clock fraction value
372  */
CCM_ANALOG_GetPfdFrac(CCM_ANALOG_Type * base,uint32_t pfdFrac)373 static inline uint32_t CCM_ANALOG_GetPfdFrac(CCM_ANALOG_Type * base, uint32_t pfdFrac)
374 {
375     return (CCM_ANALOG_TUPLE_REG(base, pfdFrac) >> CCM_ANALOG_TUPLE_SHIFT(pfdFrac)) & CCM_ANALOG_PFD_480A_PFD0_FRAC_MASK;
376 }
377 
378 /*!
379  * @brief Get PFD clock frequency
380  *
381  * @param base CCM_ANALOG base pointer.
382  * @param pfdFrac PFD clock fraction (see @ref _ccm_analog_pfd_frac enumeration)
383  * @return PFD clock frequency in Hz
384  */
385 uint32_t CCM_ANALOG_GetPfdFreq(CCM_ANALOG_Type * base, uint32_t pfdFrac);
386 
387 /*@}*/
388 
389 #if defined(__cplusplus)
390 }
391 #endif
392 
393 /*! @}*/
394 
395 #endif /* __CCM_ANALOG_IMX7D_H__ */
396 /*******************************************************************************
397  * EOF
398  ******************************************************************************/
399