1 /*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7 #include "fsl_gpio_cmsis.h"
8 #include "fsl_gpio.h"
9 #include "fsl_pint.h"
10
11 /* Component ID definition, used by tools. */
12 #ifndef FSL_COMPONENT_ID
13 #define FSL_COMPONENT_ID "platform.drivers.lpc_gpio_cmsis"
14 #endif
15
16 #if (defined(RTE_GPIO_PORT0) && RTE_GPIO_PORT0 && defined(GPIO)) || \
17 (defined(RTE_GPIO_PORT1) && RTE_GPIO_PORT1 && defined(GPIO))
18
19 /*!
20 * @brief Status of the GPIO inteface
21 *
22 */
23 typedef struct _gpio_cmsis_status
24 {
25 bool is_inited;
26 } gpio_cmsis_status_t;
27
28 /*!
29 * @brief Type define for the pin state variable
30 *
31 */
32 typedef uint32_t gpio_cmsis_pin_state_t;
33
34 /*!
35 * @brief Map structure between GPIO pin and PINT instance
36 *
37 */
38 typedef struct _gpio_cmsis_map
39 {
40 uint32_t pin_index;
41 pint_pin_int_t pint_index;
42 void (*pinmux_init_func)(void);
43 void (*pinmux_deinit_func)(void);
44 } gpio_cmsis_map_t;
45
46 /*!
47 * @brief Configuration for CMSIS GPIO Inteface instance
48 *
49 */
50 typedef struct _gpio_cmsis_config
51 {
52 GPIO_Type *gpio_base;
53 PINT_Type *pint_base;
54 uint8_t port_index;
55 uint8_t size_of_map;
56 uint8_t size_of_context;
57 } gpio_cmsis_config_t;
58
59 /*!
60 * @brief Context for GPIO with interrupt enabled
61 *
62 */
63 typedef struct _gpio_cmsis_contexts
64 {
65 bool is_occupied;
66 uint8_t pin_index;
67 pint_pin_int_t pint_index;
68 ARM_GPIO_SignalEvent_t callback;
69 } gpio_cmsis_context_t;
70
71 /*!
72 * @brief Handle for CMSIS GPIO inteface instance
73 *
74 */
75 typedef struct _gpio_cmsis_handle
76 {
77 gpio_cmsis_config_t const *config;
78 gpio_cmsis_status_t status;
79 gpio_cmsis_pin_state_t interrupt_pins;
80 gpio_cmsis_context_t *contexts;
81 gpio_cmsis_map_t const *maps;
82 } gpio_cmsis_handle_t;
83
84 /*
85 * CMSIS GPIO Version
86 */
87 #define ARM_CMSIS_GPIO_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1U, 0U) /* driver version */
88
89 /* Driver Version */
90 static const ARM_DRIVER_VERSION s_gpioDriverVersion = {(ARM_GPIO_API_VERSION), (ARM_CMSIS_GPIO_DRV_VERSION)};
91
92 /* Driver Capabilities */
93 static const ARM_GPIO_CAPABILITIES s_gpioDriverCapabilities = {
94 1, /* IRQ Supported */
95 };
96
97 /*
98 * ARMCC does not support split the data section automatically, so the driver
99 * needs to split the data to separate sections explicitly, to reduce codesize.
100 */
101 #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
102 #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
103 #endif /* defined(__CC_ARM) || defined(__ARMCC_VERSION) */
104
CMSIS_GPIO_GetMapResource(gpio_cmsis_handle_t * handle,uint32_t pin)105 static gpio_cmsis_map_t const *CMSIS_GPIO_GetMapResource(gpio_cmsis_handle_t *handle, uint32_t pin)
106 {
107 for (uint32_t i = 0; i < handle->config->size_of_map; i++)
108 {
109 if (pin == handle->maps[i].pin_index)
110 {
111 return &(handle->maps[i]);
112 }
113 }
114
115 return NULL;
116 }
117
CMSIS_GPIO_GetContextResource(gpio_cmsis_handle_t * handle,uint32_t pintr)118 static gpio_cmsis_context_t *CMSIS_GPIO_GetContextResource(gpio_cmsis_handle_t *handle, uint32_t pintr)
119 {
120 for (uint32_t i = 0; i < handle->config->size_of_context; i++)
121 {
122 gpio_cmsis_context_t *cxt = &(handle->contexts[i]);
123
124 if (cxt->is_occupied == false)
125 {
126 continue;
127 }
128
129 if ((pintr == (uint32_t)cxt->pint_index))
130 {
131 return cxt;
132 }
133 }
134
135 return NULL;
136 }
137
CMSIS_GPIO_GetEmptyContext(gpio_cmsis_handle_t * handle)138 static gpio_cmsis_context_t *CMSIS_GPIO_GetEmptyContext(gpio_cmsis_handle_t *handle)
139 {
140 for (uint32_t i = 0; i < handle->config->size_of_context; i++)
141 {
142 gpio_cmsis_context_t *cxt = &(handle->contexts[i]);
143
144 if (cxt->is_occupied == false)
145 {
146 return cxt;
147 }
148 }
149
150 return NULL;
151 }
152
CMSIS_GPIO_MapIRQTypeToPINTType(uint32_t irq_type)153 static pint_pin_enable_t CMSIS_GPIO_MapIRQTypeToPINTType(uint32_t irq_type)
154 {
155 pint_pin_enable_t pin_type = kPINT_PinIntEnableNone;
156
157 switch (irq_type)
158 {
159 case ARM_GPIO_INTERRUPT_DISABLE:
160 pin_type = kPINT_PinIntEnableNone;
161 break;
162 case ARM_GPIO_INTERRUPT_LOGIC_ONE:
163 pin_type = kPINT_PinIntEnableHighLevel;
164 break;
165 case ARM_GPIO_INTERRUPT_LOGIC_ZERO:
166 pin_type = kPINT_PinIntEnableLowLevel;
167 break;
168 case ARM_GPIO_INTERRUPT_RISING_EDGE:
169 pin_type = kPINT_PinIntEnableRiseEdge;
170 break;
171 case ARM_GPIO_INTERRUPT_FALLING_EDGE:
172 pin_type = kPINT_PinIntEnableFallEdge;
173 break;
174 case ARM_GPIO_INTERRUPT_RISING_FALLING_EDGE:
175 pin_type = kPINT_PinIntEnableBothEdges;
176 break;
177
178 default:
179 /* Must be one of the interrupt type above */
180 assert(false);
181 break;
182 }
183
184 return pin_type;
185 }
186
CMSIS_GPIO_Initialize(gpio_cmsis_handle_t * handle)187 static int32_t CMSIS_GPIO_Initialize(gpio_cmsis_handle_t *handle)
188 {
189 if (handle->status.is_inited != true)
190 {
191 GPIO_PortInit(handle->config->gpio_base, handle->config->port_index);
192 handle->status.is_inited = true;
193 }
194
195 return ARM_DRIVER_OK;
196 }
197
CMSIS_GPIO_DeinitPin(gpio_cmsis_handle_t * handle,uint32_t pin)198 static int32_t CMSIS_GPIO_DeinitPin(gpio_cmsis_handle_t *handle, uint32_t pin)
199 {
200 /* Do pin MUX configuration if provided pinmux funciton */
201 gpio_cmsis_map_t const *map = CMSIS_GPIO_GetMapResource(handle, pin);
202 uint32_t mask = 0x01UL << pin;
203
204 if ((map != NULL) && (map->pinmux_deinit_func != NULL))
205 {
206 map->pinmux_deinit_func();
207 }
208
209 /* Disable Interrupt if interrupt is configured previously */
210 if ((map != NULL) && (((handle->interrupt_pins & mask) != 0U)))
211 {
212 PINT_DisableCallbackByIndex(handle->config->pint_base, map->pint_index);
213 /* Reset the software state */
214 handle->interrupt_pins &= ~mask;
215 }
216
217 return ARM_DRIVER_OK;
218 }
219
CMSIS_GPIO_Uninitialize(gpio_cmsis_handle_t * handle)220 static int32_t CMSIS_GPIO_Uninitialize(gpio_cmsis_handle_t *handle)
221 {
222 if (handle->status.is_inited == true)
223 {
224 for (uint32_t i = 0U; i < 8U * sizeof(gpio_cmsis_pin_state_t); i++)
225 {
226 (void)CMSIS_GPIO_DeinitPin(handle, i);
227 }
228
229 handle->status.is_inited = false;
230 }
231
232 return ARM_DRIVER_OK;
233 }
234
CMSIS_GPIO_InitPinAsOutput(gpio_cmsis_handle_t * handle,uint32_t pin,uint32_t output_logic)235 static int32_t CMSIS_GPIO_InitPinAsOutput(gpio_cmsis_handle_t *handle, uint32_t pin, uint32_t output_logic)
236 {
237 assert(handle->status.is_inited == true);
238
239 /* Init Pin as output */
240 gpio_pin_config_t pin_config = {kGPIO_DigitalOutput, (uint8_t)output_logic};
241 GPIO_PinInit(handle->config->gpio_base, handle->config->port_index, pin, &pin_config);
242
243 /* Do pin MUX configuration if provided pinmux funciton */
244 gpio_cmsis_map_t const *map = CMSIS_GPIO_GetMapResource(handle, pin);
245 if ((map != NULL) && (map->pinmux_init_func != NULL))
246 {
247 map->pinmux_init_func();
248 }
249
250 return ARM_DRIVER_OK;
251 }
252
CMSIS_GPIO_Callback(gpio_cmsis_handle_t * handle,pint_pin_int_t pintr,uint32_t pmatch_status)253 static void CMSIS_GPIO_Callback(gpio_cmsis_handle_t *handle, pint_pin_int_t pintr, uint32_t pmatch_status)
254 {
255 /* Iterate all registered callback context */
256 gpio_cmsis_context_t *cxt = CMSIS_GPIO_GetContextResource(handle, (uint32_t)pintr);
257
258 if ((cxt != NULL) && (cxt->callback != NULL))
259 {
260 cxt->callback(cxt->pin_index); // EVENT
261 }
262 }
263
CMSIS_GPIO_InitPinAsInput(gpio_cmsis_handle_t * handle,uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event,pint_cb_t pint_callback)264 static int32_t CMSIS_GPIO_InitPinAsInput(gpio_cmsis_handle_t *handle,
265 uint32_t pin,
266 uint32_t irq_type,
267 ARM_GPIO_SignalEvent_t cb_event,
268 pint_cb_t pint_callback)
269 {
270 assert(handle->status.is_inited == true);
271
272 gpio_cmsis_map_t const *map = CMSIS_GPIO_GetMapResource(handle, pin);
273
274 /* Configure the interrupt */
275 if (irq_type != ARM_GPIO_INTERRUPT_NONE)
276 {
277 /* Assert to remind user to provide the map between PORT and interrupt */
278 if (map == NULL)
279 {
280 assert(false);
281 return ARM_DRIVER_ERROR;
282 }
283
284 gpio_cmsis_context_t *cxt = CMSIS_GPIO_GetEmptyContext(handle);
285
286 /* Make sure there are still empty slot for this pin interrupt */
287 if (cxt == NULL)
288 {
289 return ARM_DRIVER_ERROR;
290 }
291
292 /* Fill the context data */
293 cxt->is_occupied = true;
294 cxt->pin_index = (uint8_t)pin;
295 cxt->pint_index = map->pint_index;
296 cxt->callback = cb_event;
297
298 /* Set the state */
299 handle->interrupt_pins |= 0x01UL << pin;
300
301 /* Configure the PINT */
302 PINT_PinInterruptConfig(handle->config->pint_base, map->pint_index, CMSIS_GPIO_MapIRQTypeToPINTType(irq_type),
303 pint_callback);
304 PINT_EnableCallbackByIndex(handle->config->pint_base, map->pint_index);
305 }
306
307 /* Do pin MUX configuration if provided pinmux funciton */
308 if ((map != NULL) && (map->pinmux_init_func != NULL))
309 {
310 map->pinmux_init_func();
311 }
312
313 return ARM_DRIVER_OK;
314 }
315
CMSIS_GPIO_PowerControl(gpio_cmsis_handle_t * handle,ARM_POWER_STATE state)316 static int32_t CMSIS_GPIO_PowerControl(gpio_cmsis_handle_t *handle, ARM_POWER_STATE state)
317 {
318 assert(handle->status.is_inited == true);
319 return ARM_DRIVER_OK;
320 }
321
CMSIS_GPIO_PinWrite(gpio_cmsis_handle_t * handle,uint32_t pin,uint32_t logic_value)322 static int32_t CMSIS_GPIO_PinWrite(gpio_cmsis_handle_t *handle, uint32_t pin, uint32_t logic_value)
323 {
324 assert(handle->status.is_inited == true);
325 GPIO_PinWrite(handle->config->gpio_base, handle->config->port_index, pin, (uint8_t)logic_value);
326 return ARM_DRIVER_OK;
327 }
328
CMSIS_GPIO_PinRead(gpio_cmsis_handle_t * handle,uint32_t pin)329 static bool CMSIS_GPIO_PinRead(gpio_cmsis_handle_t *handle, uint32_t pin)
330 {
331 assert(handle->status.is_inited == true);
332 return (GPIO_PinRead(handle->config->gpio_base, handle->config->port_index, pin) != 0U);
333 }
334
CMSIS_GPIO_PortToggle(gpio_cmsis_handle_t * handle,uint32_t ored_pins)335 static int32_t CMSIS_GPIO_PortToggle(gpio_cmsis_handle_t *handle, uint32_t ored_pins)
336 {
337 assert(handle->status.is_inited == true);
338 GPIO_PortToggle(handle->config->gpio_base, handle->config->port_index, ored_pins);
339 return ARM_DRIVER_OK;
340 }
341
CMSIS_GPIO_PinToggle(gpio_cmsis_handle_t * handle,uint32_t pin)342 static int32_t CMSIS_GPIO_PinToggle(gpio_cmsis_handle_t *handle, uint32_t pin)
343 {
344 assert(handle->status.is_inited == true);
345 return CMSIS_GPIO_PortToggle(handle, 0x01UL << pin);
346 }
347
CMSIS_GPIO_PortWrite(gpio_cmsis_handle_t * handle,uint32_t ored_pins,uint32_t logic_value)348 static int32_t CMSIS_GPIO_PortWrite(gpio_cmsis_handle_t *handle, uint32_t ored_pins, uint32_t logic_value)
349 {
350 assert(handle->status.is_inited == true);
351 if (logic_value == 0U)
352 {
353 GPIO_PortClear(handle->config->gpio_base, handle->config->port_index, ored_pins);
354 }
355 else
356 {
357 GPIO_PortSet(handle->config->gpio_base, handle->config->port_index, ored_pins);
358 }
359 return ARM_DRIVER_OK;
360 }
361
CMSIS_GPIO_PortRead(gpio_cmsis_handle_t * handle)362 static uint32_t CMSIS_GPIO_PortRead(gpio_cmsis_handle_t *handle)
363 {
364 assert(handle->status.is_inited == true);
365 return GPIO_PortRead(handle->config->gpio_base, handle->config->port_index);
366 }
367
CMSIS_GPIO_Control(gpio_cmsis_handle_t * handle,uint32_t pin,uint32_t control,uint32_t arg)368 static int32_t CMSIS_GPIO_Control(gpio_cmsis_handle_t *handle, uint32_t pin, uint32_t control, uint32_t arg)
369 {
370 assert(handle->status.is_inited == true);
371 int32_t returncode = ARM_DRIVER_OK;
372
373 switch (control)
374 {
375 case ARM_GPIO_CONTROL_INTERRUPT:
376 {
377 gpio_cmsis_map_t const *map = CMSIS_GPIO_GetMapResource(handle, pin);
378
379 if (map == NULL)
380 {
381 returncode = ARM_DRIVER_ERROR_PARAMETER;
382 }
383 else
384 {
385 switch (arg)
386 {
387 case ARM_GPIO_INTERRUPT_DISABLE:
388 PINT_DisableCallbackByIndex(handle->config->pint_base, map->pint_index);
389 break;
390
391 case ARM_GPIO_INTERRUPT_ENABLE:
392 PINT_EnableCallbackByIndex(handle->config->pint_base, map->pint_index);
393 break;
394
395 default:
396 returncode = ARM_DRIVER_ERROR_PARAMETER;
397 break;
398 }
399 }
400 break;
401 }
402
403 default:
404 returncode = ARM_DRIVER_ERROR_PARAMETER;
405 break;
406 }
407 return returncode;
408 }
409
CMSIS_GPIO_GetVersion(void)410 static ARM_DRIVER_VERSION CMSIS_GPIO_GetVersion(void)
411 {
412 return s_gpioDriverVersion;
413 }
414
CMSIS_GPIO_GetCapabilities(void)415 static ARM_GPIO_CAPABILITIES CMSIS_GPIO_GetCapabilities(void)
416 {
417 return s_gpioDriverCapabilities;
418 }
419
420 #endif //(RTE_GPIO_PORT0 && defined(GPIO)) || (RTE_GPIO_PORT1 && defined(GPIO))
421
422 /******************************* GPIO PORT 0 **********************************************/
423 #if defined(GPIO) && defined(RTE_GPIO_PORT0) && RTE_GPIO_PORT0
424 static const gpio_cmsis_map_t s_gpio_port0_cmsis_maps[] = RTE_GPIO_PORT0_MAPS;
425
426 static const gpio_cmsis_config_t s_gpio_port0_cmsis_config = {
427 .gpio_base = GPIO,
428 .pint_base = PINT,
429 .port_index = 0,
430 .size_of_map = RTE_GPIO_PORT0_SIZE_OF_MAP,
431 .size_of_context = RTE_GPIO_PORT0_MAX_INTERRUPT_CONTEXTS,
432 };
433
434 static gpio_cmsis_context_t s_gpio_port0_contexts[RTE_GPIO_PORT0_MAX_INTERRUPT_CONTEXTS];
435
436 static gpio_cmsis_handle_t s_gpio_port0_handle = {
437 .config = &s_gpio_port0_cmsis_config,
438 .maps = s_gpio_port0_cmsis_maps,
439 .status = {0},
440 .interrupt_pins = 0x0U,
441 .contexts = s_gpio_port0_contexts,
442 };
443
GPIO_PORT0_Initialize(void)444 static int32_t GPIO_PORT0_Initialize(void)
445 {
446 return CMSIS_GPIO_Initialize(&s_gpio_port0_handle);
447 }
448
GPIO_PORT0_Uninitialize(void)449 static int32_t GPIO_PORT0_Uninitialize(void)
450 {
451 return CMSIS_GPIO_Uninitialize(&s_gpio_port0_handle);
452 }
453
GPIO_PORT0_InitPinAsOutput(uint32_t pin,uint32_t output_logic)454 static int32_t GPIO_PORT0_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
455 {
456 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port0_handle, pin, output_logic);
457 }
458
GPIO_PORT0_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)459 static void GPIO_PORT0_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
460 {
461 CMSIS_GPIO_Callback(&s_gpio_port0_handle, pintr, pmatch_status);
462 }
463
GPIO_PORT0_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)464 static int32_t GPIO_PORT0_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
465 {
466 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port0_handle, pin, irq_type, cb_event, GPIO_PORT0_Callback);
467 }
468
GPIO_PORT0_PowerControl(ARM_POWER_STATE state)469 static int32_t GPIO_PORT0_PowerControl(ARM_POWER_STATE state)
470 {
471 return CMSIS_GPIO_PowerControl(&s_gpio_port0_handle, state);
472 }
473
GPIO_PORT0_PinWrite(uint32_t pin,uint32_t logic_value)474 static int32_t GPIO_PORT0_PinWrite(uint32_t pin, uint32_t logic_value)
475 {
476 return CMSIS_GPIO_PinWrite(&s_gpio_port0_handle, pin, logic_value);
477 }
478
GPIO_PORT0_PinToggle(uint32_t pin)479 static int32_t GPIO_PORT0_PinToggle(uint32_t pin)
480 {
481 return CMSIS_GPIO_PinToggle(&s_gpio_port0_handle, pin);
482 }
483
GPIO_PORT0_PinRead(uint32_t pin)484 static bool GPIO_PORT0_PinRead(uint32_t pin)
485 {
486 return CMSIS_GPIO_PinRead(&s_gpio_port0_handle, pin);
487 }
488
GPIO_PORT0_PortWrite(uint32_t ored_pins,uint32_t logic_value)489 static int32_t GPIO_PORT0_PortWrite(uint32_t ored_pins, uint32_t logic_value)
490 {
491 return CMSIS_GPIO_PortWrite(&s_gpio_port0_handle, ored_pins, logic_value);
492 }
493
GPIO_PORT0_PortToggle(uint32_t ored_pins)494 static int32_t GPIO_PORT0_PortToggle(uint32_t ored_pins)
495 {
496 return CMSIS_GPIO_PortToggle(&s_gpio_port0_handle, ored_pins);
497 }
498
GPIO_PORT0_PortRead(void)499 static uint32_t GPIO_PORT0_PortRead(void)
500 {
501 return CMSIS_GPIO_PortRead(&s_gpio_port0_handle);
502 }
503
GPIO_PORT0_Control(uint32_t pin,uint32_t control,uint32_t arg)504 static int32_t GPIO_PORT0_Control(uint32_t pin, uint32_t control, uint32_t arg)
505 {
506 return CMSIS_GPIO_Control(&s_gpio_port0_handle, pin, control, arg);
507 }
508
509 ARM_DRIVER_GPIO Driver_GPIO_PORT0 = {
510 .GetVersion = CMSIS_GPIO_GetVersion,
511 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
512 .Initialize = GPIO_PORT0_Initialize,
513 .Uninitialize = GPIO_PORT0_Uninitialize,
514 .InitPinAsOutput = GPIO_PORT0_InitPinAsOutput,
515 .InitPinAsInput = GPIO_PORT0_InitPinAsInput,
516 .PowerControl = GPIO_PORT0_PowerControl,
517 .PinWrite = GPIO_PORT0_PinWrite,
518 .PinRead = GPIO_PORT0_PinRead,
519 .PinToggle = GPIO_PORT0_PinToggle,
520 .PortWrite = GPIO_PORT0_PortWrite,
521 .PortToggle = GPIO_PORT0_PortToggle,
522 .PortRead = GPIO_PORT0_PortRead,
523 .Control = GPIO_PORT0_Control,
524 };
525 #endif
526
527 #if defined(GPIO) && RTE_GPIO_PORT1
528 static const gpio_cmsis_map_t s_gpio_port1_cmsis_maps[] = RTE_GPIO_PORT1_MAPS;
529
530 static const gpio_cmsis_config_t s_gpio_port1_cmsis_config = {
531 .gpio_base = GPIO,
532 .pint_base = PINT,
533 .port_index = 1,
534 .size_of_map = RTE_GPIO_PORT1_SIZE_OF_MAP,
535 .size_of_context = RTE_GPIO_PORT1_MAX_INTERRUPT_CONTEXTS,
536 };
537
538 static gpio_cmsis_context_t s_gpio_port1_contexts[RTE_GPIO_PORT1_MAX_INTERRUPT_CONTEXTS];
539
540 static gpio_cmsis_handle_t s_gpio_port1_handle = {
541 .config = &s_gpio_port1_cmsis_config,
542 .maps = s_gpio_port1_cmsis_maps,
543 .status = {0},
544 .interrupt_pins = 0x0U,
545 .contexts = s_gpio_port1_contexts,
546 };
547
GPIO_PORT1_Initialize(void)548 static int32_t GPIO_PORT1_Initialize(void)
549 {
550 return CMSIS_GPIO_Initialize(&s_gpio_port1_handle);
551 }
552
GPIO_PORT1_Uninitialize(void)553 static int32_t GPIO_PORT1_Uninitialize(void)
554 {
555 return CMSIS_GPIO_Uninitialize(&s_gpio_port1_handle);
556 }
557
GPIO_PORT1_InitPinAsOutput(uint32_t pin,uint32_t output_logic)558 static int32_t GPIO_PORT1_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
559 {
560 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port1_handle, pin, output_logic);
561 }
562
GPIO_PORT1_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)563 static void GPIO_PORT1_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
564 {
565 CMSIS_GPIO_Callback(&s_gpio_port1_handle, pintr, pmatch_status);
566 }
567
GPIO_PORT1_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)568 static int32_t GPIO_PORT1_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
569 {
570 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port1_handle, pin, irq_type, cb_event, GPIO_PORT1_Callback);
571 }
572
GPIO_PORT1_PowerControl(ARM_POWER_STATE state)573 static int32_t GPIO_PORT1_PowerControl(ARM_POWER_STATE state)
574 {
575 return CMSIS_GPIO_PowerControl(&s_gpio_port1_handle, state);
576 }
577
GPIO_PORT1_PinWrite(uint32_t pin,uint32_t logic_value)578 static int32_t GPIO_PORT1_PinWrite(uint32_t pin, uint32_t logic_value)
579 {
580 return CMSIS_GPIO_PinWrite(&s_gpio_port1_handle, pin, logic_value);
581 }
582
GPIO_PORT1_PinToggle(uint32_t pin)583 static int32_t GPIO_PORT1_PinToggle(uint32_t pin)
584 {
585 return CMSIS_GPIO_PinToggle(&s_gpio_port1_handle, pin);
586 }
587
GPIO_PORT1_PinRead(uint32_t pin)588 static bool GPIO_PORT1_PinRead(uint32_t pin)
589 {
590 return CMSIS_GPIO_PinRead(&s_gpio_port1_handle, pin);
591 }
592
GPIO_PORT1_PortWrite(uint32_t ored_pins,uint32_t logic_value)593 static int32_t GPIO_PORT1_PortWrite(uint32_t ored_pins, uint32_t logic_value)
594 {
595 return CMSIS_GPIO_PortWrite(&s_gpio_port1_handle, ored_pins, logic_value);
596 }
597
GPIO_PORT1_PortToggle(uint32_t ored_pins)598 static int32_t GPIO_PORT1_PortToggle(uint32_t ored_pins)
599 {
600 return CMSIS_GPIO_PortToggle(&s_gpio_port1_handle, ored_pins);
601 }
602
GPIO_PORT1_PortRead(void)603 static uint32_t GPIO_PORT1_PortRead(void)
604 {
605 return CMSIS_GPIO_PortRead(&s_gpio_port1_handle);
606 }
607
GPIO_PORT1_Control(uint32_t pin,uint32_t control,uint32_t arg)608 static int32_t GPIO_PORT1_Control(uint32_t pin, uint32_t control, uint32_t arg)
609 {
610 return CMSIS_GPIO_Control(&s_gpio_port1_handle, pin, control, arg);
611 }
612
613 ARM_DRIVER_GPIO Driver_GPIO_PORT1 = {
614 .GetVersion = CMSIS_GPIO_GetVersion,
615 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
616 .Initialize = GPIO_PORT1_Initialize,
617 .Uninitialize = GPIO_PORT1_Uninitialize,
618 .InitPinAsOutput = GPIO_PORT1_InitPinAsOutput,
619 .InitPinAsInput = GPIO_PORT1_InitPinAsInput,
620 .PowerControl = GPIO_PORT1_PowerControl,
621 .PinWrite = GPIO_PORT1_PinWrite,
622 .PinRead = GPIO_PORT1_PinRead,
623 .PinToggle = GPIO_PORT1_PinToggle,
624 .PortWrite = GPIO_PORT1_PortWrite,
625 .PortToggle = GPIO_PORT1_PortToggle,
626 .PortRead = GPIO_PORT1_PortRead,
627 .Control = GPIO_PORT1_Control,
628 };
629
630 #endif
631
632 #if defined(GPIO) && defined(RTE_GPIO_PORT2) && RTE_GPIO_PORT2
633 static const gpio_cmsis_map_t s_gpio_port2_cmsis_maps[] = RTE_GPIO_PORT2_MAPS;
634
635 static const gpio_cmsis_config_t s_gpio_port2_cmsis_config = {
636 .gpio_base = GPIO,
637 .pint_base = PINT,
638 .port_index = 2,
639 .size_of_map = RTE_GPIO_PORT2_SIZE_OF_MAP,
640 .size_of_context = RTE_GPIO_PORT2_MAX_INTERRUPT_CONTEXTS,
641 };
642
643 static gpio_cmsis_context_t s_gpio_port2_contexts[RTE_GPIO_PORT2_MAX_INTERRUPT_CONTEXTS];
644
645 static gpio_cmsis_handle_t s_gpio_port2_handle = {
646 .config = &s_gpio_port2_cmsis_config,
647 .maps = s_gpio_port2_cmsis_maps,
648 .status = {0},
649 .interrupt_pins = 0x0U,
650 .contexts = s_gpio_port2_contexts,
651 };
652
GPIO_PORT2_Initialize(void)653 static int32_t GPIO_PORT2_Initialize(void)
654 {
655 return CMSIS_GPIO_Initialize(&s_gpio_port2_handle);
656 }
657
GPIO_PORT2_Uninitialize(void)658 static int32_t GPIO_PORT2_Uninitialize(void)
659 {
660 return CMSIS_GPIO_Uninitialize(&s_gpio_port2_handle);
661 }
662
GPIO_PORT2_InitPinAsOutput(uint32_t pin,uint32_t output_logic)663 static int32_t GPIO_PORT2_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
664 {
665 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port2_handle, pin, output_logic);
666 }
667
GPIO_PORT2_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)668 static void GPIO_PORT2_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
669 {
670 CMSIS_GPIO_Callback(&s_gpio_port2_handle, pintr, pmatch_status);
671 }
672
GPIO_PORT2_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)673 static int32_t GPIO_PORT2_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
674 {
675 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port2_handle, pin, irq_type, cb_event, GPIO_PORT2_Callback);
676 }
677
GPIO_PORT2_PowerControl(ARM_POWER_STATE state)678 static int32_t GPIO_PORT2_PowerControl(ARM_POWER_STATE state)
679 {
680 return CMSIS_GPIO_PowerControl(&s_gpio_port2_handle, state);
681 }
682
GPIO_PORT2_PinWrite(uint32_t pin,uint32_t logic_value)683 static int32_t GPIO_PORT2_PinWrite(uint32_t pin, uint32_t logic_value)
684 {
685 return CMSIS_GPIO_PinWrite(&s_gpio_port2_handle, pin, logic_value);
686 }
687
GPIO_PORT2_PinToggle(uint32_t pin)688 static int32_t GPIO_PORT2_PinToggle(uint32_t pin)
689 {
690 return CMSIS_GPIO_PinToggle(&s_gpio_port2_handle, pin);
691 }
692
GPIO_PORT2_PinRead(uint32_t pin)693 static bool GPIO_PORT2_PinRead(uint32_t pin)
694 {
695 return CMSIS_GPIO_PinRead(&s_gpio_port2_handle, pin);
696 }
697
GPIO_PORT2_PortWrite(uint32_t ored_pins,uint32_t logic_value)698 static int32_t GPIO_PORT2_PortWrite(uint32_t ored_pins, uint32_t logic_value)
699 {
700 return CMSIS_GPIO_PortWrite(&s_gpio_port2_handle, ored_pins, logic_value);
701 }
702
GPIO_PORT2_PortToggle(uint32_t ored_pins)703 static int32_t GPIO_PORT2_PortToggle(uint32_t ored_pins)
704 {
705 return CMSIS_GPIO_PortToggle(&s_gpio_port2_handle, ored_pins);
706 }
707
GPIO_PORT2_PortRead(void)708 static uint32_t GPIO_PORT2_PortRead(void)
709 {
710 return CMSIS_GPIO_PortRead(&s_gpio_port2_handle);
711 }
712
GPIO_PORT2_Control(uint32_t pin,uint32_t control,uint32_t arg)713 static int32_t GPIO_PORT2_Control(uint32_t pin, uint32_t control, uint32_t arg)
714 {
715 return CMSIS_GPIO_Control(&s_gpio_port2_handle, pin, control, arg);
716 }
717
718 ARM_DRIVER_GPIO Driver_GPIO_PORT2 = {
719 .GetVersion = CMSIS_GPIO_GetVersion,
720 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
721 .Initialize = GPIO_PORT2_Initialize,
722 .Uninitialize = GPIO_PORT2_Uninitialize,
723 .InitPinAsOutput = GPIO_PORT2_InitPinAsOutput,
724 .InitPinAsInput = GPIO_PORT2_InitPinAsInput,
725 .PowerControl = GPIO_PORT2_PowerControl,
726 .PinWrite = GPIO_PORT2_PinWrite,
727 .PinRead = GPIO_PORT2_PinRead,
728 .PinToggle = GPIO_PORT2_PinToggle,
729 .PortWrite = GPIO_PORT2_PortWrite,
730 .PortToggle = GPIO_PORT2_PortToggle,
731 .PortRead = GPIO_PORT2_PortRead,
732 .Control = GPIO_PORT2_Control,
733 };
734
735 #endif
736
737 #if defined(GPIO) && defined(RTE_GPIO_PORT3) && RTE_GPIO_PORT3
738 static const gpio_cmsis_map_t s_gpio_port3_cmsis_maps[] = RTE_GPIO_PORT3_MAPS;
739
740 static const gpio_cmsis_config_t s_gpio_port3_cmsis_config = {
741 .gpio_base = GPIO,
742 .pint_base = PINT,
743 .port_index = 3,
744 .size_of_map = RTE_GPIO_PORT3_SIZE_OF_MAP,
745 .size_of_context = RTE_GPIO_PORT3_MAX_INTERRUPT_CONTEXTS,
746 };
747
748 static gpio_cmsis_context_t s_gpio_port3_contexts[RTE_GPIO_PORT3_MAX_INTERRUPT_CONTEXTS];
749
750 static gpio_cmsis_handle_t s_gpio_port3_handle = {
751 .config = &s_gpio_port3_cmsis_config,
752 .maps = s_gpio_port3_cmsis_maps,
753 .status = {0},
754 .interrupt_pins = 0x0U,
755 .contexts = s_gpio_port3_contexts,
756 };
757
GPIO_PORT3_Initialize(void)758 static int32_t GPIO_PORT3_Initialize(void)
759 {
760 return CMSIS_GPIO_Initialize(&s_gpio_port3_handle);
761 }
762
GPIO_PORT3_Uninitialize(void)763 static int32_t GPIO_PORT3_Uninitialize(void)
764 {
765 return CMSIS_GPIO_Uninitialize(&s_gpio_port3_handle);
766 }
767
GPIO_PORT3_InitPinAsOutput(uint32_t pin,uint32_t output_logic)768 static int32_t GPIO_PORT3_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
769 {
770 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port3_handle, pin, output_logic);
771 }
772
GPIO_PORT3_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)773 static void GPIO_PORT3_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
774 {
775 CMSIS_GPIO_Callback(&s_gpio_port3_handle, pintr, pmatch_status);
776 }
777
GPIO_PORT3_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)778 static int32_t GPIO_PORT3_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
779 {
780 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port3_handle, pin, irq_type, cb_event, GPIO_PORT3_Callback);
781 }
782
GPIO_PORT3_PowerControl(ARM_POWER_STATE state)783 static int32_t GPIO_PORT3_PowerControl(ARM_POWER_STATE state)
784 {
785 return CMSIS_GPIO_PowerControl(&s_gpio_port3_handle, state);
786 }
787
GPIO_PORT3_PinWrite(uint32_t pin,uint32_t logic_value)788 static int32_t GPIO_PORT3_PinWrite(uint32_t pin, uint32_t logic_value)
789 {
790 return CMSIS_GPIO_PinWrite(&s_gpio_port3_handle, pin, logic_value);
791 }
792
GPIO_PORT3_PinToggle(uint32_t pin)793 static int32_t GPIO_PORT3_PinToggle(uint32_t pin)
794 {
795 return CMSIS_GPIO_PinToggle(&s_gpio_port3_handle, pin);
796 }
797
GPIO_PORT3_PinRead(uint32_t pin)798 static bool GPIO_PORT3_PinRead(uint32_t pin)
799 {
800 return CMSIS_GPIO_PinRead(&s_gpio_port3_handle, pin);
801 }
802
GPIO_PORT3_PortWrite(uint32_t ored_pins,uint32_t logic_value)803 static int32_t GPIO_PORT3_PortWrite(uint32_t ored_pins, uint32_t logic_value)
804 {
805 return CMSIS_GPIO_PortWrite(&s_gpio_port3_handle, ored_pins, logic_value);
806 }
807
GPIO_PORT3_PortToggle(uint32_t ored_pins)808 static int32_t GPIO_PORT3_PortToggle(uint32_t ored_pins)
809 {
810 return CMSIS_GPIO_PortToggle(&s_gpio_port3_handle, ored_pins);
811 }
812
GPIO_PORT3_PortRead(void)813 static uint32_t GPIO_PORT3_PortRead(void)
814 {
815 return CMSIS_GPIO_PortRead(&s_gpio_port3_handle);
816 }
817
GPIO_PORT3_Control(uint32_t pin,uint32_t control,uint32_t arg)818 static int32_t GPIO_PORT3_Control(uint32_t pin, uint32_t control, uint32_t arg)
819 {
820 return CMSIS_GPIO_Control(&s_gpio_port3_handle, pin, control, arg);
821 }
822
823 ARM_DRIVER_GPIO Driver_GPIO_PORT3 = {
824 .GetVersion = CMSIS_GPIO_GetVersion,
825 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
826 .Initialize = GPIO_PORT3_Initialize,
827 .Uninitialize = GPIO_PORT3_Uninitialize,
828 .InitPinAsOutput = GPIO_PORT3_InitPinAsOutput,
829 .InitPinAsInput = GPIO_PORT3_InitPinAsInput,
830 .PowerControl = GPIO_PORT3_PowerControl,
831 .PinWrite = GPIO_PORT3_PinWrite,
832 .PinRead = GPIO_PORT3_PinRead,
833 .PinToggle = GPIO_PORT3_PinToggle,
834 .PortWrite = GPIO_PORT3_PortWrite,
835 .PortToggle = GPIO_PORT3_PortToggle,
836 .PortRead = GPIO_PORT3_PortRead,
837 .Control = GPIO_PORT3_Control,
838 };
839
840 #endif
841
842 #if defined(GPIO) && defined(RTE_GPIO_PORT4) && RTE_GPIO_PORT4
843 static const gpio_cmsis_map_t s_gpio_port4_cmsis_maps[] = RTE_GPIO_PORT4_MAPS;
844
845 static const gpio_cmsis_config_t s_gpio_port4_cmsis_config = {
846 .gpio_base = GPIO,
847 .pint_base = PINT,
848 .port_index = 4,
849 .size_of_map = RTE_GPIO_PORT4_SIZE_OF_MAP,
850 .size_of_context = RTE_GPIO_PORT4_MAX_INTERRUPT_CONTEXTS,
851 };
852
853 static gpio_cmsis_context_t s_gpio_port4_contexts[RTE_GPIO_PORT4_MAX_INTERRUPT_CONTEXTS];
854
855 static gpio_cmsis_handle_t s_gpio_port4_handle = {
856 .config = &s_gpio_port4_cmsis_config,
857 .maps = s_gpio_port4_cmsis_maps,
858 .status = {0},
859 .interrupt_pins = 0x0U,
860 .contexts = s_gpio_port4_contexts,
861 };
862
GPIO_PORT4_Initialize(void)863 static int32_t GPIO_PORT4_Initialize(void)
864 {
865 return CMSIS_GPIO_Initialize(&s_gpio_port4_handle);
866 }
867
GPIO_PORT4_Uninitialize(void)868 static int32_t GPIO_PORT4_Uninitialize(void)
869 {
870 return CMSIS_GPIO_Uninitialize(&s_gpio_port4_handle);
871 }
872
GPIO_PORT4_InitPinAsOutput(uint32_t pin,uint32_t output_logic)873 static int32_t GPIO_PORT4_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
874 {
875 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port4_handle, pin, output_logic);
876 }
877
GPIO_PORT4_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)878 static void GPIO_PORT4_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
879 {
880 CMSIS_GPIO_Callback(&s_gpio_port4_handle, pintr, pmatch_status);
881 }
882
GPIO_PORT4_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)883 static int32_t GPIO_PORT4_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
884 {
885 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port4_handle, pin, irq_type, cb_event, GPIO_PORT4_Callback);
886 }
887
GPIO_PORT4_PowerControl(ARM_POWER_STATE state)888 static int32_t GPIO_PORT4_PowerControl(ARM_POWER_STATE state)
889 {
890 return CMSIS_GPIO_PowerControl(&s_gpio_port4_handle, state);
891 }
892
GPIO_PORT4_PinWrite(uint32_t pin,uint32_t logic_value)893 static int32_t GPIO_PORT4_PinWrite(uint32_t pin, uint32_t logic_value)
894 {
895 return CMSIS_GPIO_PinWrite(&s_gpio_port4_handle, pin, logic_value);
896 }
897
GPIO_PORT4_PinToggle(uint32_t pin)898 static int32_t GPIO_PORT4_PinToggle(uint32_t pin)
899 {
900 return CMSIS_GPIO_PinToggle(&s_gpio_port4_handle, pin);
901 }
902
GPIO_PORT4_PinRead(uint32_t pin)903 static bool GPIO_PORT4_PinRead(uint32_t pin)
904 {
905 return CMSIS_GPIO_PinRead(&s_gpio_port4_handle, pin);
906 }
907
GPIO_PORT4_PortWrite(uint32_t ored_pins,uint32_t logic_value)908 static int32_t GPIO_PORT4_PortWrite(uint32_t ored_pins, uint32_t logic_value)
909 {
910 return CMSIS_GPIO_PortWrite(&s_gpio_port4_handle, ored_pins, logic_value);
911 }
912
GPIO_PORT4_PortToggle(uint32_t ored_pins)913 static int32_t GPIO_PORT4_PortToggle(uint32_t ored_pins)
914 {
915 return CMSIS_GPIO_PortToggle(&s_gpio_port4_handle, ored_pins);
916 }
917
GPIO_PORT4_PortRead(void)918 static uint32_t GPIO_PORT4_PortRead(void)
919 {
920 return CMSIS_GPIO_PortRead(&s_gpio_port4_handle);
921 }
922
GPIO_PORT4_Control(uint32_t pin,uint32_t control,uint32_t arg)923 static int32_t GPIO_PORT4_Control(uint32_t pin, uint32_t control, uint32_t arg)
924 {
925 return CMSIS_GPIO_Control(&s_gpio_port4_handle, pin, control, arg);
926 }
927
928 ARM_DRIVER_GPIO Driver_GPIO_PORT4 = {
929 .GetVersion = CMSIS_GPIO_GetVersion,
930 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
931 .Initialize = GPIO_PORT4_Initialize,
932 .Uninitialize = GPIO_PORT4_Uninitialize,
933 .InitPinAsOutput = GPIO_PORT4_InitPinAsOutput,
934 .InitPinAsInput = GPIO_PORT4_InitPinAsInput,
935 .PowerControl = GPIO_PORT4_PowerControl,
936 .PinWrite = GPIO_PORT4_PinWrite,
937 .PinRead = GPIO_PORT4_PinRead,
938 .PinToggle = GPIO_PORT4_PinToggle,
939 .PortWrite = GPIO_PORT4_PortWrite,
940 .PortToggle = GPIO_PORT4_PortToggle,
941 .PortRead = GPIO_PORT4_PortRead,
942 .Control = GPIO_PORT4_Control,
943 };
944
945 #endif
946
947 #if defined(GPIO) && defined(RTE_GPIO_PORT5) && RTE_GPIO_PORT5
948 const gpio_cmsis_map_t s_gpio_port5_cmsis_maps[] = RTE_GPIO_PORT5_MAPS;
949
950 const gpio_cmsis_config_t s_gpio_port5_cmsis_config = {
951 .gpio_base = GPIO,
952 .pint_base = PINT,
953 .port_index = 5,
954 .size_of_map = RTE_GPIO_PORT5_SIZE_OF_MAP,
955 .size_of_context = RTE_GPIO_PORT5_MAX_INTERRUPT_CONTEXTS,
956 };
957
958 static gpio_cmsis_context_t s_gpio_port5_contexts[RTE_GPIO_PORT5_MAX_INTERRUPT_CONTEXTS];
959
960 static gpio_cmsis_handle_t s_gpio_port5_handle = {
961 .config = &s_gpio_port5_cmsis_config,
962 .maps = s_gpio_port5_cmsis_maps,
963 .status = {0},
964 .interrupt_pins = 0x0U,
965 .contexts = s_gpio_port5_contexts,
966 };
967
GPIO_PORT5_Initialize(void)968 static int32_t GPIO_PORT5_Initialize(void)
969 {
970 return CMSIS_GPIO_Initialize(&s_gpio_port5_handle);
971 }
972
GPIO_PORT5_Uninitialize(void)973 static int32_t GPIO_PORT5_Uninitialize(void)
974 {
975 return CMSIS_GPIO_Uninitialize(&s_gpio_port5_handle);
976 }
977
GPIO_PORT5_InitPinAsOutput(uint32_t pin,uint32_t output_logic)978 static int32_t GPIO_PORT5_InitPinAsOutput(uint32_t pin, uint32_t output_logic)
979 {
980 return CMSIS_GPIO_InitPinAsOutput(&s_gpio_port5_handle, pin, output_logic);
981 }
982
GPIO_PORT5_Callback(pint_pin_int_t pintr,uint32_t pmatch_status)983 static void GPIO_PORT5_Callback(pint_pin_int_t pintr, uint32_t pmatch_status)
984 {
985 CMSIS_GPIO_Callback(&s_gpio_port5_handle, pintr, pmatch_status);
986 }
987
GPIO_PORT5_InitPinAsInput(uint32_t pin,uint32_t irq_type,ARM_GPIO_SignalEvent_t cb_event)988 static int32_t GPIO_PORT5_InitPinAsInput(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event)
989 {
990 return CMSIS_GPIO_InitPinAsInput(&s_gpio_port5_handle, pin, irq_type, cb_event, GPIO_PORT5_Callback);
991 }
992
GPIO_PORT5_PowerControl(ARM_POWER_STATE state)993 static int32_t GPIO_PORT5_PowerControl(ARM_POWER_STATE state)
994 {
995 return CMSIS_GPIO_PowerControl(&s_gpio_port5_handle, state);
996 }
997
GPIO_PORT5_PinWrite(uint32_t pin,uint32_t logic_value)998 static int32_t GPIO_PORT5_PinWrite(uint32_t pin, uint32_t logic_value)
999 {
1000 return CMSIS_GPIO_PinWrite(&s_gpio_port5_handle, pin, logic_value);
1001 }
1002
GPIO_PORT5_PinToggle(uint32_t pin)1003 static int32_t GPIO_PORT5_PinToggle(uint32_t pin)
1004 {
1005 return CMSIS_GPIO_PinToggle(&s_gpio_port5_handle, pin);
1006 }
1007
GPIO_PORT5_PinRead(uint32_t pin)1008 static bool GPIO_PORT5_PinRead(uint32_t pin)
1009 {
1010 return CMSIS_GPIO_PinRead(&s_gpio_port5_handle, pin);
1011 }
1012
GPIO_PORT5_PortWrite(uint32_t ored_pins,uint32_t logic_value)1013 static int32_t GPIO_PORT5_PortWrite(uint32_t ored_pins, uint32_t logic_value)
1014 {
1015 return CMSIS_GPIO_PortWrite(&s_gpio_port5_handle, ored_pins, logic_value);
1016 }
1017
GPIO_PORT5_PortToggle(uint32_t ored_pins)1018 static int32_t GPIO_PORT5_PortToggle(uint32_t ored_pins)
1019 {
1020 return CMSIS_GPIO_PortToggle(&s_gpio_port5_handle, ored_pins);
1021 }
1022
GPIO_PORT5_PortRead(void)1023 static uint32_t GPIO_PORT5_PortRead(void)
1024 {
1025 return CMSIS_GPIO_PortRead(&s_gpio_port5_handle);
1026 }
1027
GPIO_PORT5_Control(uint32_t pin,uint32_t control,uint32_t arg)1028 static int32_t GPIO_PORT5_Control(uint32_t pin, uint32_t control, uint32_t arg)
1029 {
1030 return CMSIS_GPIO_Control(&s_gpio_port5_handle, pin, control, arg);
1031 }
1032
1033 ARM_DRIVER_GPIO Driver_GPIO_PORT5 = {
1034 .GetVersion = CMSIS_GPIO_GetVersion,
1035 .GetCapabilities = CMSIS_GPIO_GetCapabilities,
1036 .Initialize = GPIO_PORT5_Initialize,
1037 .Uninitialize = GPIO_PORT5_Uninitialize,
1038 .InitPinAsOutput = GPIO_PORT5_InitPinAsOutput,
1039 .InitPinAsInput = GPIO_PORT5_InitPinAsInput,
1040 .PowerControl = GPIO_PORT5_PowerControl,
1041 .PinWrite = GPIO_PORT5_PinWrite,
1042 .PinRead = GPIO_PORT5_PinRead,
1043 .PinToggle = GPIO_PORT5_PinToggle,
1044 .PortWrite = GPIO_PORT5_PortWrite,
1045 .PortToggle = GPIO_PORT5_PortToggle,
1046 .PortRead = GPIO_PORT5_PortRead,
1047 .Control = GPIO_PORT5_Control,
1048 };
1049
1050 #endif
1051