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Searched refs:USBDCD_TIMER1_TDCD_DBNC_MASK (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h8173 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
8175 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h8173 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
8175 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h19604 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
19606 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h23876 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
23880 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h25733 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
25737 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h25687 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
25691 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h26046 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
26048 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h27026 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
27028 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h25348 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
25350 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h29301 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
29305 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h31144 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
31148 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h31144 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
31148 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h25350 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
25352 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h88995 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
88998 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
DMIMX8QM6_cm4_core0.h94512 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
94514 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
DMIMX8QM6_cm4_core1.h94511 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
94513 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h108668 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
108672 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h108668 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
108672 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h108669 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
108673 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h108669 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
108673 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h139129 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
139133 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h139131 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
139135 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h139131 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
139135 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_cm4.h139131 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
139135 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h139131 #define USBDCD_TIMER1_TDCD_DBNC_MASK (0x3FF0000U) macro
139135 … (((uint32_t)(((uint32_t)(x)) << USBDCD_TIMER1_TDCD_DBNC_SHIFT)) & USBDCD_TIMER1_TDCD_DBNC_MASK)

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