1 /*
2 * Copyright 2018, NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #include "fsl_tmu.h"
9
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.tmu_1"
13 #endif
14
15 /*! @brief TEMPMON calibration data mask. */
16 #define TMU_ROOMTEMPMASK 0xFFU
17 #define TMU_ROOMTEMPSHIFT 0x00U
18 #define TMU_HOTTEMPMASK 0xFF00U
19 #define TMU_HOTTEMPSHIFT 0x08U
20
21 /*******************************************************************************
22 * Prototypes
23 ******************************************************************************/
24 /*!
25 * @brief Get instance number for TMU module.
26 *
27 * @param base TMU peripheral base address
28 */
29 static uint32_t TMU_GetInstance(TMU_Type *base);
30
31 /*******************************************************************************
32 * Variables
33 ******************************************************************************/
34
35 /*! @brief Pointers to TMU bases for each instance. */
36 static TMU_Type *const s_tmuBases[] = TMU_BASE_PTRS;
37
38 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
39 /*! @brief Pointers to TMU clocks for each instance. */
40 static const clock_ip_name_t s_tmuClocks[] = TMU_CLOCKS;
41 #endif
42 /*******************************************************************************
43 * Code
44 ******************************************************************************/
TMU_GetInstance(TMU_Type * base)45 static uint32_t TMU_GetInstance(TMU_Type *base)
46 {
47 uint32_t instance;
48
49 /* Find the instance index from base address mappings. */
50 for (instance = 0; instance < ARRAY_SIZE(s_tmuBases); instance++)
51 {
52 if (s_tmuBases[instance] == base)
53 {
54 break;
55 }
56 }
57
58 assert(instance < ARRAY_SIZE(s_tmuBases));
59
60 return instance;
61 }
62
TMU_Init(TMU_Type * base,const tmu_config_t * config)63 void TMU_Init(TMU_Type *base, const tmu_config_t *config)
64 {
65 assert(NULL != base);
66 assert(NULL != config);
67
68 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
69 /* Enable TMU clock. */
70 CLOCK_EnableClock(s_tmuClocks[TMU_GetInstance(base)]);
71 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL. */
72
73 /* Disable TMU monitor mode. */
74 TMU_Enable(base, false);
75
76 /* Clear interrupt relevant register. */
77 TMU_ClearInterruptStatusFlags(base, (uint32_t)kTMU_ImmediateTemperatureStatusFlags |
78 (uint32_t)kTMU_AverageTemperatureStatusFlags |
79 (uint32_t)kTMU_AverageTemperatureCriticalStatusFlags);
80
81 /* Configure TER register. */
82 base->TER = TMU_TER_ALPF(config->averageLPF);
83 }
84
TMU_Deinit(TMU_Type * base)85 void TMU_Deinit(TMU_Type *base)
86 {
87 /* Disable TMU monitor mode.. */
88 TMU_Enable(base, false);
89 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
90 /* Disable TMU clock. */
91 CLOCK_DisableClock(s_tmuClocks[TMU_GetInstance(base)]);
92 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL. */
93 }
94
TMU_GetDefaultConfig(tmu_config_t * config)95 void TMU_GetDefaultConfig(tmu_config_t *config)
96 {
97 assert(NULL != config);
98
99 config->averageLPF = kTMU_AverageLowPassFilter0_5;
100 }
101
TMU_GetInterruptStatusFlags(TMU_Type * base,tmu_interrupt_status_t * status)102 void TMU_GetInterruptStatusFlags(TMU_Type *base, tmu_interrupt_status_t *status)
103 {
104 assert(NULL != status);
105
106 status->interruptDetectMask = base->TIDR;
107 }
108
TMU_ClearInterruptStatusFlags(TMU_Type * base,uint32_t mask)109 void TMU_ClearInterruptStatusFlags(TMU_Type *base, uint32_t mask)
110 {
111 /* For immediate temperature threshold interrupt. */
112 if (0U != ((uint32_t)kTMU_ImmediateTemperatureStatusFlags & mask))
113 {
114 base->TIER = TMU_TIER_ITTEIE_MASK; /* Clear interrupt detect register. */
115 }
116 /* For average temperature threshold interrupt. */
117 if (0U != ((uint32_t)kTMU_AverageTemperatureStatusFlags & mask))
118 {
119 base->TIER = TMU_TIER_ATTEIE_MASK; /* Clear interrupt detect register. */
120 }
121 /* For Average temperature critical threshold interrupt. */
122 if (0U != ((uint32_t)kTMU_AverageTemperatureCriticalStatusFlags & mask))
123 {
124 base->TIER = TMU_TIER_ATCTEIE_MASK; /* Clear interrupt detect register. */
125 }
126 }
127
TMU_GetImmediateTemperature(TMU_Type * base,uint32_t * temperature)128 status_t TMU_GetImmediateTemperature(TMU_Type *base, uint32_t *temperature)
129 {
130 assert(NULL != temperature);
131 status_t status = kStatus_Success;
132
133 if (0U == (TMU_TRITSR_V_MASK & base->TRITSR))
134 {
135 status = kStatus_Fail;
136 }
137 else
138 {
139 *temperature = (TMU_TRITSR_TEMP_MASK & base->TRITSR) >> TMU_TRITSR_TEMP_SHIFT;
140 }
141
142 return status;
143 }
144
TMU_GetAverageTemperature(TMU_Type * base,uint32_t * temperature)145 status_t TMU_GetAverageTemperature(TMU_Type *base, uint32_t *temperature)
146 {
147 assert(NULL != temperature);
148 status_t status = kStatus_Success;
149
150 if (0U == (TMU_TRATSR_V_MASK & base->TRATSR))
151 {
152 status = kStatus_Fail;
153 }
154 else
155 {
156 *temperature = (TMU_TRATSR_TEMP_MASK & base->TRATSR) >> TMU_TRATSR_TEMP_SHIFT;
157 }
158
159 return status;
160 }
161
TMU_SetHighTemperatureThresold(TMU_Type * base,const tmu_thresold_config_t * config)162 void TMU_SetHighTemperatureThresold(TMU_Type *base, const tmu_thresold_config_t *config)
163 {
164 assert(NULL != config);
165
166 /* Configure the high temperature immediate threshold. */
167 if (config->immediateThresoldEnable)
168 {
169 base->TMHTITR = TMU_TMHTITR_EN_MASK | TMU_TMHTITR_TEMP(config->immediateThresoldValue);
170 }
171 else
172 {
173 base->TMHTITR = 0U;
174 }
175 /* Configure the high temperature average threshold. */
176 if (config->AverageThresoldEnable)
177 {
178 base->TMHTATR = TMU_TMHTATR_EN_MASK | TMU_TMHTATR_TEMP(config->averageThresoldValue);
179 }
180 else
181 {
182 base->TMHTATR = 0U;
183 }
184 /* Configure the high temperature average critical threshold. */
185 if (config->AverageCriticalThresoldEnable)
186 {
187 base->TMHTACTR = TMU_TMHTACTR_EN_MASK | TMU_TMHTACTR_TEMP(config->averageCriticalThresoldValue);
188 }
189 else
190 {
191 base->TMHTACTR = 0U;
192 }
193 }
194
