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Searched refs:TIDR (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/tmu/
Dfsl_tmu.c227 status->interruptDetectMask = base->TIDR; in TMU_GetInterruptStatusFlags()
245 base->TIDR = TMU_TIDR_ITTE_MASK; /* Clear interrupt detect register. */ in TMU_ClearInterruptStatusFlags()
251 base->TIDR = TMU_TIDR_ATTE_MASK; /* Clear interrupt detect register. */ in TMU_ClearInterruptStatusFlags()
257 base->TIDR = TMU_TIDR_ATCTE_MASK; /* Clear interrupt detect register. */ in TMU_ClearInterruptStatusFlags()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/tmu_2/
Dfsl_tmu.h205 return base->TIDR; in TMU_GetInterruptStatusFlags()
216 base->TIDR = mask; in TMU_ClearInterruptStatusFlags()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/tmu_1/
Dfsl_tmu.c106 status->interruptDetectMask = base->TIDR; in TMU_GetInterruptStatusFlags()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_TMU.h83 __IO uint32_t TIDR; /**< Interrupt Detect, offset: 0x24 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h50074 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h50072 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h50074 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h50086 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
DMIMX8MN6_cm7.h50072 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h50074 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h50072 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h53128 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0x24 … member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h55301 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0x24 … member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h55301 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0x24 … member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h55301 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0x24 … member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h55301 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0x24 … member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h68890 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
DMIMX8MM6_ca53.h68355 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_ca53.h96014 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member
DMIMX8ML8_dsp.h91965 …__IO uint32_t TIDR; /**< TMU Interrupt Detect register, offset: 0xC */ member

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