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Searched refs:SW_MUX_CTL_PAD_KEY_ROW1 (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.5.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h15676 __IO uint32_t SW_MUX_CTL_PAD_KEY_ROW1; /**< Pad Mux Register, offset: 0xBC */ member
16225 #define IOMUXC_SW_MUX_CTL_PAD_KEY_ROW1_REG(base) ((base)->SW_MUX_CTL_PAD_KEY_ROW1)