/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flexspi/ |
D | fsl_flexspi.h | 662 … *index = (uint8_t)((base->STS1 & FLEXSPI_STS1_IPCMDERRID_MASK) >> FLEXSPI_STS1_IPCMDERRID_SHIFT); in FLEXSPI_GetIPCommandErrorCode() 664 … (uint32_t)((base->STS1 & FLEXSPI_STS1_IPCMDERRCODE_MASK) >> FLEXSPI_STS1_IPCMDERRCODE_SHIFT)); in FLEXSPI_GetIPCommandErrorCode() 675 … *index = (uint8_t)(base->STS1 & FLEXSPI_STS1_AHBCMDERRID_MASK) >> FLEXSPI_STS1_AHBCMDERRID_SHIFT; in FLEXSPI_GetAHBCommandErrorCode() 677 … (uint32_t)((base->STS1 & FLEXSPI_STS1_AHBCMDERRCODE_MASK) >> FLEXSPI_STS1_AHBCMDERRCODE_SHIFT)); in FLEXSPI_GetAHBCommandErrorCode()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 19589 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 33951 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 19573 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 33934 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 21873 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 36911 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 20541 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 35509 uint32_t STS1; /**< Status register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 21326 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 39775 uint32_t STS1; /**< Status register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 22251 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 37798 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 21875 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 40321 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 23037 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 41992 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 23106 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 41986 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 7270 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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D | MIMXRT685S_cm33.h | 13372 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
D | MIMXRT1015.h | 16127 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 13528 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm4.h | 37719 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 67779 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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D | MIMXRT1165_cm7.h | 37722 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 66846 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 13372 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
D | MIMXRT1175_cm7.h | 48846 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 78030 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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D | MIMXRT1175_cm4.h | 48843 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 78963 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/ |
D | MIMXRT1171.h | 48846 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 78030 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
D | MIMXRT1166_cm7.h | 39729 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 72311 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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D | MIMXRT1166_cm4.h | 39726 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member 73244 uint32_t STS1; /**< Status Register 1, offset: 0xC4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/ |
D | LPC5536.h | 12324 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 13008 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/ |
D | LPC5534.h | 12324 __I uint32_t STS1; /**< Status Register 1, offset: 0xE4 */ member
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