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Searched refs:SPI_FIFORD_RXDATA_MASK (Results 1 – 25 of 50) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h7558 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
7562 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h7859 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
7863 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
DLPC54114_cm4.h7870 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
7874 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h7871 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
7875 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h11246 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
11250 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h12028 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
12032 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h11384 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
11388 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h12038 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
12042 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h15607 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
15611 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h14606 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
14609 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h15532 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
15536 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h16252 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16256 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h16139 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16143 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h16139 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16143 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h20147 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20151 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h16175 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16179 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h16931 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16935 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h15312 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
15315 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h16453 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16457 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h16931 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
16935 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h20264 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20268 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h20264 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20268 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h20147 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20151 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h20147 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20151 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h20264 #define SPI_FIFORD_RXDATA_MASK (0xFFFFU) macro
20268 … (((uint32_t)(((uint32_t)(x)) << SPI_FIFORD_RXDATA_SHIFT)) & SPI_FIFORD_RXDATA_MASK)

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